part10 - Part 10: Virtual Memory Virtual vs. Physical...

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Part 10: Virtual Memory Part 10: Virtual Memory
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Silberschatz, Galvin and Gagne ©2005 Virtual vs. Physical Address Space Virtual vs. Physical Address Space Each process has its own virtual address space, which may be larger than the physical address space (namely size of RAM). The concept of a virtual address space that is bound to a separate physical address space is central to proper memory management Virtual address – generated by the CPU; also referred to as logical address Physical address – address seen by the memory unit
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Silberschatz, Galvin and Gagne ©2005 Memory-Management Unit ( Memory-Management Unit ( MMU MMU ) ) Hardware device that maps virtual to physical address In MMU scheme, the value in the relocation register is added to every address generated by a user process at the time it is sent to memory The user program deals with virtual addresses; it never sees the real physical addresses CPU generates virtual addresses
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Silberschatz, Galvin and Gagne ©2005 The Memory Management Unit The Memory Management Unit CPU Memory Cache Memory Management Unit (MMU) Translation Look- Aside Buffer (TLB) Page Table Register Page Table RAM I/O Address Bus Data Bus Virtual Address Physical Address
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Silberschatz, Galvin and Gagne ©2005 Paging Paging Physical address space of a process can be noncontiguous; process is allocated physical memory whenever the latter is available Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8,192 bytes) Divide logical memory into blocks of same size called pages Keep track of all free frames To run a program of size n pages, need to find n free frames and load program Set up a page table to translate logical to physical addresses Internal fragmentation
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Silberschatz, Galvin and Gagne ©2005 Paging Paging The Virtual Memory System will keep in memory the pages that are currently in use. It will leave in disk the memory that is not in use.
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Silberschatz, Galvin and Gagne ©2005 Address Translation Scheme Address Translation Scheme Virtual address generated by CPU is divided into: Page number ( p ) – used as an index into a page table which contains base address of each page in physical memory Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit For given logical address space 2 m and page size 2 n page number (p) page offset (d) m - n n
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Silberschatz, Galvin and Gagne ©2005 Paging Hardware Paging Hardware MMU
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Silberschatz, Galvin and Gagne ©2005 Paging Model of Logical and Physical Memory Paging Model of Logical and Physical Memory
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Silberschatz, Galvin and Gagne ©2005 Paging Example Paging Example 32-byte memory and 4-byte pages
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Silberschatz, Galvin and Gagne ©2005 Free Frames Free Frames Before allocation After allocation
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Silberschatz, Galvin and Gagne ©2005 Implementation of Page Table Implementation of Page Table Page table is kept in main memory Page-table base register (PTBR) points to the page
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This note was uploaded on 03/20/2012 for the course CS 354 taught by Professor Staff during the Spring '08 term at Purdue University-West Lafayette.

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part10 - Part 10: Virtual Memory Virtual vs. Physical...

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