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Unformatted text preview: posted on the website. 3. CMFB circuits. Use a CT CMFB circuit without CM sensing resistors. 4. Simulate the open-loop gain vs. the output differential voltage. Check that all transistors remain in saturation at the maximum output swing of ± 1.25 V. 5. Simulate the open-loop frequency response and produce the Bode plot. Determine the unity-gain bandwidth, second pole frequency and the phase margin. Report Guideline Write a concise report, not exceeding three pages for text and two pages for figures. It is very important that you show your results clearly. Please typewrite your report with simulation results/figures attached. Teamwork Policy Individual works are expected. Discussion with others in class is encouraged. However, please submit a genuine report and/or design. No sharing of SPICE decks ....
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This note was uploaded on 03/19/2012 for the course EE 7329 at University of Texas at Dallas, Richardson.