Unformatted text preview: 2. Repeat part 1 by breaking the loop open at the output nodes and record the RR again. 3. Simulate the loop-gain of the differential loop and compare with the RR’s. 4. Repeat parts 1-3 for the folded-cascode amplifier you designed in HW#2. 5. Devise a simulation to obtain the RR of the common-mode feedback loop. You might want to break the loop open either at the output nodes or at the gate of the tail current transistor. Repeat this simulation with the differential feedback open and closed. Does it make any difference for the RR measured? Why? Report Guideline Write a concise report, not exceeding 4 pages text and 2 pages figure. It is very important that you show your results clearly. Please typewrite your report with simulation results/figures attached. Teamwork Policy Individual works are expected. Discussion with others in class is encouraged. However, please submit a genuine report and/or design. No sharing of SPICE decks ....
View Full Document
- Electrical Engineering, Cybernetics, Erik Jonsson School of Electrical Engineering, output CM bias, CT CMFB loop