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hw4 - 2 Repeat part 1 by breaking the loop open at the...

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1 U NIVERSITY OF T EXAS AT D ALLAS Erik Jonsson School of Electrical Engineering and Computer Science EECT 7329 Homework Assignment #4 (Assigned 11/10, due 11/29 in class) Objective In this assignment, you are asked to perform return-ratio and loop-gain simulations on the fully differential amplifiers you simulated in HW#3. The closed-loop configuration of your amplifier is shown below. The total capacitive loading should be close to 5 pF. The CT CMFB loop should be always connected to ensure proper CM levels at the output (and at the summing nodes). Use real transistor CMFB circuits instead of ideal level shifters. You are free to choose the input CM bias (at V id side); the output CM bias (at V od side) must be set to close to V DD /2. 1. Take the 5-transistor amplifier and bias its input (at V id side) to set the output swing (at V od side) to 0 V. Break the loop open at the summing nodes, properly set up the DC bias of the circuit and simulate the generalized return ratio of the loop.
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Unformatted text preview: 2. Repeat part 1 by breaking the loop open at the output nodes and record the RR again. 3. Simulate the loop-gain of the differential loop and compare with the RR’s. 4. Repeat parts 1-3 for the folded-cascode amplifier you designed in HW#2. 5. Devise a simulation to obtain the RR of the common-mode feedback loop. You might want to break the loop open either at the output nodes or at the gate of the tail current transistor. Repeat this simulation with the differential feedback open and closed. Does it make any difference for the RR measured? Why? Report Guideline Write a concise report, not exceeding 4 pages text and 2 pages figure. It is very important that you show your results clearly. Please typewrite your report with simulation results/figures attached. Teamwork Policy Individual works are expected. Discussion with others in class is encouraged. However, please submit a genuine report and/or design. No sharing of SPICE decks ....
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