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mid_sample_soln

# mid_sample_soln - '1[25 For the differential MOS amplifier...

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'1.. [25] For the differential MOS amplifier shown below, the output is connected to a load resistor RL through a large AC-coupling capacitor. All transistors are biased in saturation. Consider only the capacitors shown in the schematic. Use the following parameters to answer the questions. Is =O.lmA, Vov's=O.lV, ),,=0, RL =Rs = 1 Ok{}, Cs =10pF, CAt =lpF, 1) Sketch the Bode plot (only magnitude) of the differential gain Adm. Indicate all pole and zero frequencies and associated gain magnitudes on your plot. [5] 2) Sketch the Bode plot (only magnitude) of the common-mode gain ACIft. Indicate all pole and zero frequencies and associated gain magnitudes on your plot. [10] Sketch the Bode plot (only magnitude) of the CMRR of this circuit (CMRR = ~ ). ~ Indicate all pole and zero frequencies and associated CMRR magnitudes on your plot. [10] B-! ~ = .~~ = ~ = ~:~~~- == I ~Alv ~ tMrroovJ;- 4~ Vov Vov (7-1 V ~S "c,.,.ot't~, r of S ::::. 0.0 (~.~E-: (A~I= '1~I' RL = I~A/v' ro~Jt -= 10 [ A~ \ -= _1~}_. -1- ~ ~ L , oa;.~ i~".f"e~ wI f~~ ~ t3..,; I :oS -tlt ~~~kl/ll\p~ ~~~» 1, 3) ttt«~~ M3 M4 : qM ~ .,.';> 1- ~MtL '» 1. VI Cs Is -1-- ~~"" ~s ""

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