active_cascode - EE 7329, Fall 2011 Handout on...

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Unformatted text preview: EE 7329, Fall 2011 Handout on Active-Cascode Analysis - 1 - CMOS Active-Cascode Gain Stage Yun Chiu I. I NTRODUCTION Invented in 1979 [1] and subsequently refined in 1990 [2]–[4], the CMOS active- cascode gain-enhancing technique † finds wide applications in analog integrated circuits, such as Nyquist-rate and oversampling data converters, sample-and-hold amplifiers, switched-capacitor filters, band-gap reference circuits, and voltage regulators. By boosting the low-frequency transconductance of the cascode device, the technique increases the output resistance of a CMOS cascode operational amplifier (op amp), and hence the voltage gain without degrading its high-frequency performance. As a result, it is ideally suitable for on-chip applications, where a large gain-bandwidth product is desirable while driving capacitive loads. In addition, as the technique derives extra gain laterally using an auxiliary amplifier (booster) without stacking up additional cascode transistors, it retains the high-swing feature of a simple cascode stage, and thus, becomes increasingly popular in scaled CMOS technologies with low supply voltages. In sampled-data applications, the circuit accuracy and speed are usually determined by the settling behavior of op amps. In an attempt to achieve a high unity-gain frequency and a high dc gain simultaneously, the active cascodes introduce a pole-zero pair (doublet) near the unity-gain frequency of the auxiliary amplifier, which potentially leads to a slow-settling behavior of such op amps [2]. An inspection-based guideline to avoid the deleterious effects of the doublet was discussed in [2] and [5]; however, a closed- form solution of the doublet hitherto does not exist. Lacking in theoretical guidance, designers always resort to circuit simulators to verify and fine tune their op amps, rendering the design process heuristic and time consuming. This note examines the doublet behavior in CMOS active cascodes. Analytical results reveal that three scenarios could arise for the closed-loop settling behavior dependent on the relative locations of the unity-gain bandwidth of the booster and that of the main op † Alternative names are gain boosting, regulated cascode, and active-feedback cascode. EE 7329, Fall 2011 Handout on Active-Cascode Analysis - 2 - amp. Section II reviews the principles of the CMOS active-cascode gain technique. Section III presents an accurate small-signal analysis of the frequency response of such amplifiers and the doublet, followed by the results on slow settling. In Section IV, computer simulation results are covered to validate the theory; and lastly, a brief summary concludes the paper in Section V. II. CMOS A CTIVE-C ASCODE G AIN T ECHNIQUE Cascodes provide a gain-enhancement function in amplifier circuits, allowing the product of the intrinsic gains of two stages–a common-source stage (CS) and a common- gate stage (CG)–to be developed in one. This has an advantage in the attainable bandwidth of the amplifier when driving a capacitive load, which itself acts as the...
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This note was uploaded on 03/19/2012 for the course EE 7329 taught by Professor Yunchiu during the Fall '11 term at University of Texas at Dallas, Richardson.

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active_cascode - EE 7329, Fall 2011 Handout on...

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