Lect2UP060_(100324)

Lect2UP060_(100324) - Lecture 060 Capacitors Page 060-1...

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Lecture 060 – Capacitors (3/24/10) Page 060-1 CMOS Analog Circuit Design © P.E. Allen - 2010 LECTURE 060 - CAPACITORS LECTURE ORGANIZATION Outline • Introduction pn junction capacitors • MOSFET gate capacitors • Conductor-insulator-conductor capacitors • Deviation from ideal behavior in capacitors • Summary CMOS Analog Circuit Design, 2 nd Edition Reference Pages 43-47, 58-59 and 63-64 Lecture 060 – Capacitors (3/24/10) Page 060-2 CMOS Analog Circuit Design © P.E. Allen - 2010 INTRODUCTION Types of Capacitors for CMOS Technology 1.) PN junction (depletion) capacitors 2.) MOSFET gate capacitors 3.) Conductor-insulator-conductor capacitors 060204-01 + - v D x d W 2 W 1 + - + - + - + - + - + - d 060207-01 p -well p + G D,S,B n + n + C ox C junction Top Conductor Bottom Conductor Dielectric Insulating layer 060206-02
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Lecture 060 – Capacitors (3/24/10) Page 060-3 CMOS Analog Circuit Design © P.E. Allen - 2010 Characterization of Capacitors What characterizes a capacitor? 1.) Dissipation (quality factor) of a capacitor is Q = ± CR p = C R s where R p is the equivalent resistance in parallel with the capacitor, C , and R s is the electrical series resistance (ESR) of the capacitor, C . 2.) Parasitic capacitors to ground from each node of the capacitor. 3.) The density of the capacitor in Farads/area. 4.) The absolute and relative accuracies of the capacitor. 5.) The C max /C min ratio which is the largest value of capacitance to the smallest when the capacitor is used as a variable capacitor ( varactor ). 6.) The variation of a variable capacitance with the control voltage. 7.) Linearity, q = Cv . Lecture 060 – Capacitors (3/24/10) Page 060-4 CMOS Analog Circuit Design © P.E. Allen - 2010 PN JUNCTION CAPACITORS PN Junction Capacitors in a Well Generally made by diffusion into the well. Anode n-well p + Substrate Fig. 2.5-011 n + n + p + Depletion Region Cathode p - substrate C j C j R wj R wj R w C w R s Anode Cathode V A V B C R wj r D Layout: Minimize the distance between the p + and n + diffusions. Two different versions have been tested. 1.) Large islands – 9 μ m on a side 2.) Small islands – 1.2 μ m on a side n -well n + diffusion p + dif- fusion Fig. 2.5-1A
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Lecture 060 – Capacitors (3/24/10) Page 060-5 CMOS Analog Circuit Design © P.E. Allen - 2010 PN -Junction Capacitors – Continued The anode should be the floating node and the cathode must be connected to ac ground. Experimental data ( Q at 2GHz, 0.5 μ m CMOS) : 060206-03 0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.5 1 1.5 2 2.5 3 3.5 C Anode (pF) Cathode Voltage (V) Large Islands Small Islands C max C min 0 20 40 60 80 100 120 0 0.5 1 1.5 2 2.5 3 3.5 Q Q min Q max Large Islands Small Islands Cathode Voltage (V) R-X Bridge Anode Cathode Cathode Voltage C R-X Bridge Anode Cathode Cathode C Small Islands (598 1.2 μ m x1.2 μ m) Large Islands (42 9 μ m x 9 μ m) Terminal Under Test C max / C min Q min Q max C max / C min Q min Q max Anode 1.23 94.5 109 1.32 19 22.6 Cathode 1.21 8.4 9.2 1.29 8.6 9.5 E. Pedersen, “RF CMOS Varactors for 2GHz Applications,” Analog Integrated Circuits and Signal Processing , vol. 26, pp. 27-36, Jan. 2001.
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Lect2UP060_(100324) - Lecture 060 Capacitors Page 060-1...

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