Lect2UP200_(100327)

Lect2UP200_(100327) - Lecture 200 Low Input Resistance...

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Lecture 200 Low Input Resistance Amplifiers (3/27/10) Page 200-1 CMOS Analog Circuit Design © P.E. Allen - 2010 LECTURE 200 – LOW INPUT RESISTANCE AMPLIFIERS – THE COMMON GATE, CASCODE AND CURRENT AMPLIFIERS LECTURE ORGANIZATION Outline • Voltage driven common gate amplifiers • Voltage driven cascode amplifier • Non-voltage driven cascode amplifier – the Miller effect • Further considerations of cascode amplifiers • Current amplifiers • Summary CMOS Analog Circuit Design, 2 nd Edition Reference Pages 199-218 Lecture 200 Low Input Resistance Amplifiers (3/27/10) Page 200-2 CMOS Analog Circuit Design © P.E. Allen - 2010 VOLTAGE-DRIVEN COMMON GATE AMPLIFIER Common Gate Amplifier Circuit: Large Signal Characteristics: V OUT (max) ± V DD V DS 3 (sat) V OUT (min) ± V DS 1 (sat) + V DS 2 (sat) Note V DS 1 (sat) = V ON 1 060609-01 V DD V PBias 1 V NBias 1 V NBias 2 v OUT M3 M2 M1 V DD v IN v OUT V NBias 2 R L I Bias v IN 060609-02 V ON 1 V T 2 V ON 2 V ON 1 + V ON 2 V DD V ON 3 v OUT v IN V NBias 2
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Lecture 200 Low Input Resistance Amplifiers (3/27/10) Page 200-3 CMOS Analog Circuit Design © P.E. Allen - 2010 Small Signal Performance of the Common Gate Amplifier Small signal model: R in 060609-03 g m 2 v gs 2 + - v gs 2 r ds 2 r ds 3 r ds 1 v in v out R out g m 2 v s 2 + - v s 2 r ds 2 r ds 3 r ds 1 v in v out R out R in i 1 v out = g m 2 v s 2 ± ² ² ³ ´ µ µ r ds 2 r ds 2 + r ds 3 r ds 3 = ± ² ² ³ ´ µ µ g m 2 r ds 2 r ds 3 r ds 2 + r ds 3 v in ± A v = v out v in = + g m 2 r ds 2 r ds 3 r ds 2 + r ds 3 R in = R in ’|| r ds 1 , R in ’ is found as follows v s 2 = ( i 1 - g m 2 v s 2 ) r ds 2 + i 1 r ds 3 = i 1 ( r ds 2 + r ds 3 ) - g m 2 r ds 2 v s 2 R in ' = v s 2 i 1 = r ds 2 + r ds 3 1 + g m 2 r ds 2 ± R in = r ds 1 || r ds 2 + r ds 3 1 + g m 2 r ds 2 R out ± r ds 2 || r ds 3 Lecture 200 Low Input Resistance Amplifiers (3/27/10) Page 200-4 CMOS Analog Circuit Design © P.E. Allen - 2010 Influence of the Load on the Input Resistance of a Common Gate Amplifier Consider a common gate amplifier with a general load: V DD V NBias 1 V NBias 2 v OUT M2 M1 v IN Load V DD V NBias 1 V NBias 2 v OUT M2 M1 v IN V DD V PBias 1 V NBias 1 V NBias 2 v OUT M3 M2 M1 v IN 070420-01 V DD V PBias 1 V NBias 1 V NBias 2 v OUT M3 M2 M1 v IN R in 1 R in 2 V PBias 2 M4 R in 3 From the previous page, the input resistance to the common gate configuration is, R in = r ds 2 + R Load 1 + g m 2 r ds 2 For the various loads shown, R in becomes: R in 1 = r ds 2 1+ g m 2 r ds 2 ± 1 g m 2 R in 2 = r ds 2 + r ds 3 1+ g m 2 r ds 2 ± 2 g m 2 R in 3 = r ds 2 + r ds 4 g m 3 r ds 3 1+ g m 2 r ds 2 ± r ds !!! ± The input resistance of the common gate configuration depends on the load at the drain
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Lecture 200 Low Input Resistance Amplifiers (3/27/10) Page 200-5 CMOS Analog Circuit Design © P.E. Allen - 2010 Frequency Response of the Common Gate Amplifier Circuit: 060609-04 V DD V PBias 1 V NBias 1 V NBias 2 v OUT M3 M2 M1 v IN C gd 3 C gd 2 C bd 2 C bd 3 C L g m 2 V s 2 + - V s 2 r ds 2 r ds 3 r ds 1 V in V out C out The frequency response can be found by replacing r ds 3 in the previous slide with, r ds 3 ± r ds 3 sr ds 3 C out + 1 where C out = C gd 2 + C gd 3 + C bd 2 + C bd 3
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Lect2UP200_(100327) - Lecture 200 Low Input Resistance...

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