Lect2UP230_(100327)

Lect2UP230_(100327) - Lecture 230 Design of Two-Stage Op...

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Lecture 230 – Design of Two-Stage Op Amps (3/27/10) Page 230-1 CMOS Analog Circuit Design © P.E. Allen - 2010 LECTURE 230 – DESIGN OF TWO-STAGE OP AMPS LECTURE OUTLINE Outline • Steps in Designing an Op Amp • Design Procedure for a Two-Stage Op Amp • Design Example of a Two-Stage Op Amp • Right Half Plane Zero • PSRR of the Two-Stage Op Amp • Summary CMOS Analog Circuit Design, 2 nd Edition Reference Pages 269-293 Lecture 230 – Design of Two-Stage Op Amps (3/27/10) Page 230-2 CMOS Analog Circuit Design © P.E. Allen - 2010 STEPS IN DESIGNING A CMOS OP AMP Steps 1.) Choosing or creating the basic structure of the op amp. This step is results in a schematic showing the transistors and their interconnections. This diagram does not change throughout the remainder of the design unless the specifications cannot be met, then a new or modified structure must be developed. 2.) Selection of the dc currents and transistor sizes. Most of the effort of design is in this category. Simulators are used to aid the designer in this phase. 3.) Physical implementation of the design. Layout of the transistors Floorplanning the connections, pin-outs, power supply buses and grounds Extraction of the physical parasitics and re-simulation Verification that the layout is a physical representation of the circuit. 4.) Fabrication 5.) Measurement Verification of the specifications Modification of the design as necessary
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Lecture 230 – Design of Two-Stage Op Amps (3/27/10) Page 230-3 CMOS Analog Circuit Design © P.E. Allen - 2010 Design Inputs Boundary conditions: 1. Process specification ( V T , K ', C ox , etc.) 2. Supply voltage and range 3. Supply current and range 4. Operating temperature and range Requirements: 1. Gain 2. Gain bandwidth 3. Settling time 4. Slew rate 5. Common-mode input range, ICMR 6. Common-mode rejection ratio, CMRR 7. Power-supply rejection ratio, PSRR 8. Output-voltage swing 9. Output resistance 10. Offset 11. Noise 12. Layout area Lecture 230 – Design of Two-Stage Op Amps (3/27/10) Page 230-4 CMOS Analog Circuit Design © P.E. Allen - 2010 Outputs of Op Amp Design The basic outputs of design are: 1.) The topology 2.) The dc currents 3.) The W and L values of transistors 4.) The values of components 060625-06 - + vin M1 M2 M3 M4 M5 M6 M7 vout VSS VBias CL + - Cc W/L ratios Topology DC Currents L W Op amp circuit or systems specifications Design of CMOS Op Amps Component values C R 50μA
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Lecture 230 – Design of Two-Stage Op Amps (3/27/10) Page 230-5 CMOS Analog Circuit Design © P.E. Allen - 2010 Some Practical Thoughts on Op Amp Design 1.) Decide upon a suitable topology. • Experience is a great help • The topology should be the one capable of meeting most of the specifications • Try to avoid “inventing” a new topology but start with an existing topology 2.) Determine the type of compensation needed to meet the specifications.
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This note was uploaded on 03/19/2012 for the course EE 3050 at Georgia Tech.

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Lect2UP230_(100327) - Lecture 230 Design of Two-Stage Op...

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