Lect2UP280-(100328)

Lect2UP280-(100328) - Lecture 280 Differential-In,...

Info iconThis preview shows pages 1–4. Sign up to view the full content.

View Full Document Right Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Lecture 280 Differential-In, Differential-Out Op Amps (3/28/10) Page 280-1 CMOS Analog Circuit Design P.E. Allen - 2010 LECTURE 280 DIFFERENTIAL-IN, DIFFERENTIAL-OUT OP AMPS LECTURE ORGANIZATION Outline Introduction Examples of differential output op amps Common mode output voltage stabilization Summary CMOS Analog Circuit Design, 2 nd Edition Reference Pages 384-393 Lecture 280 Differential-In, Differential-Out Op Amps (3/28/10) Page 280-2 CMOS Analog Circuit Design P.E. Allen - 2010 INTRODUCTION Why Differential Output Op Amps? Cancellation of common mode signals including clock feedthrough Increased signal swing v 1 v 2 v 1- v 2 t t t A-A A-A 2 A- 2 A Fig. 7.3-1 Cancellation of even-order harmonics Symbol:- + v in v out +-- +- + Fig. 7.3-1A Lecture 280 Differential-In, Differential-Out Op Amps (3/28/10) Page 280-3 CMOS Analog Circuit Design P.E. Allen - 2010 Common Mode Output Voltage Stabilization If the common mode gain not small, it may cause the common mode output voltage to be poorly defined. Illustration: V DD v od t 070506-01 V SS V DD v od t V SS V DD v od t V SS CM output voltage properly defined, V cm = 0 CM output voltage too large, V cm = 0.5 V DD CM output voltage too small, V cm = 0.5 V SS Remember that: v OUT = A vd ( v ID ) A cm ( v CM ) Lecture 280 Differential-In, Differential-Out Op Amps (3/28/10) Page 280-4 CMOS Analog Circuit Design P.E. Allen - 2010 EXAMPLES OF DIFFERENTIAL OUTPUT OP AMPS (OTAS) Two-Stage, Miller, Differential-In, Differential-Out Op Amp Note that the upper ICMR is V DD - V SGP + V TN ( OCMR ) = V DD + | V SS | - V SDP (sat) - V DSN (sat) The maximum peak-to-peak output voltage 2 OCMR Conversion between differential outputs and single-ended outputs: v od C L +- +- +- v id +- v o 1 2 C L +- +- +- v id +- v o 2 +- 2 C L Fig. 7.3-4 v i 1 M1 M2 M3 M4 M5 M6 M8 V DD V SS V BN +- C c M9 C c V BP +- v i 2 v o 1 v o R z R z M7 Fig. 7.3-3 Lecture 280 Differential-In, Differential-Out Op Amps (3/28/10) Page 280-5 CMOS Analog Circuit Design P.E. Allen - 2010 Two-Stage, Miller, Differential-In, Differential-Out Op Amp with Push-Pull Output v i 1 M1 M2 M3 M4 M5 M6 M7 V DD V SS V BN +- C c M9 C c V BP +- v i 2 v o 1 v o 2 R z R z M8 Fig. 7.3-6 M10 M12 M13 M14 Comments: Able to actively source and sink output current Output quiescent current poorly defined Lecture 280 Differential-In, Differential-Out Op Amps (3/28/10) Page 280-6 CMOS Analog Circuit Design P.E. Allen - 2010 Folded-Cascode, Differential Output Op Amp 060717-01 V PB 1 M4 M5 I 6 V PB 2 I 4 I 5 V DD I 7 M6 M7 V NB 2 M8 M9 M10 M11 + v IN v OUT V NB 1 I 1 I 2 M1 M2 M3 I 3 C L V NB 1 + C L No longer has the low-frequency asymmetry in signal path gains....
View Full Document

Page1 / 12

Lect2UP280-(100328) - Lecture 280 Differential-In,...

This preview shows document pages 1 - 4. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online