Lect2UP300-(100328)

Lect2UP300-(100328) - Lecture 300 Low Voltage Op Amps...

Info iconThis preview shows pages 1–4. Sign up to view the full content.

View Full Document Right Arrow Icon
Lecture 300 – Low Voltage Op Amps (3/28/10) Page 300-1 CMOS Analog Circuit Design © P.E. Allen - 2010 LECTURE 300 – LOW VOLTAGE OP AMPS LECTURE ORGANIZATION Outline • Introduction • Low voltage input stages • Low voltage gain stages • Low voltage bias circuits • Low voltage op amps • Summary CMOS Analog Circuit Design, 2 nd Edition Reference Pages 415-432 Lecture 300 – Low Voltage Op Amps (3/28/10) Page 300-2 CMOS Analog Circuit Design © P.E. Allen - 2010 INTRODUCTION Implications of Low-Voltage, Strong-Inversion Operation • Reduced power supply means decreased dynamic range • Nonlinearity will increase because the transistor is working close to V DS (sat) • Large values of ± because the transistor is working close to V DS (sat) • Increased drain-bulk and source-bulk capacitances because they are less reverse biased. • Large values of currents and W/L ratios to get high transconductance • Small values of currents and large values of W/L will give small V DS (sat) • Severely reduced input common mode range • Switches will require charge pumps
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Lecture 300 – Low Voltage Op Amps (3/28/10) Page 300-3 CMOS Analog Circuit Design © P.E. Allen - 2010 What are the Limits of Power Supply? The limit comes when there is no signal range left when the dc drops are subtracted from V DD . Minimum power supply (no signal swing range): V DD (min.) = V T + 2 V ON For differential amplifiers, the minimum power supply is: V DD (min.) = 3 V ON However, to have any input common mode range, the effective minimum power supply is, V DD (min.) = V T + 2 V ON 060802-01 V DD V PB 1 V NB 1 M1 M2 M3 M4 + - V ON V T + V ON + - + - V T + V ON V ON + - 060802-02 V PB 1 V DD V NB 1 + - V ON + - V ON + - V ON + - V T + V ON + - V T + V ON M1 M2 M3 M4 M5 Lecture 300 – Low Voltage Op Amps (3/28/10) Page 300-4 CMOS Analog Circuit Design © P.E. Allen - 2010 Minimum Power Supply Limit – Continued The previous consideration of the differential amplifier did not consider getting the signal out of the amplifier. This will add another V ON . 060802-03 V PB 1 V DD V NB 1 + - V ON + - V ON + - V ON + - V T + V ON + - V T + V ON M1 M2 M3 M4 M5 V PB 1 V PB 2 M6 M7 M8 M9 + - V ON V T + V ON + - V T Therefore, V DD (min.) = V T + 3 V ON This could be reduced to 3 V ON with the floating battery but its implementation probably requires more than 3 V ON of power supply. Note the output signal swing is V T + V ON while the input common range is V ON .
Background image of page 2
Lecture 300 – Low Voltage Op Amps (3/28/10) Page 300-5 CMOS Analog Circuit Design © P.E. Allen - 2010 LOW VOLTAGE INPUT STAGES Input Common Mode Voltage Range Minimum power supply ( ICMR = 0): V DD (min) = V SD 3 (sat)- V T 1 + V GS 1 + V DS 5 (sat) = V SD 3 (sat)+ V DS 1 (sat)+ V DS 5 (sat) Input common-mode range: V icm (upper) = V DD - V SD 3 (sat) + V T 1 V icm (lower) = V DS 5 (sat) + V GS 1 If the threshold magnitudes are 0.7V, V DD = 1.5V and the saturation voltages are 0.3V, then V icm (upper) = 1.5 - 0.3 + 0.7 = 1.9V
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 4
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 03/19/2012 for the course EE 3050 at Georgia Tech.

Page1 / 17

Lect2UP300-(100328) - Lecture 300 Low Voltage Op Amps...

This preview shows document pages 1 - 4. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online