Lecture 300 – Low Voltage Op Amps (3/28/10)
Page 3001
CMOS Analog Circuit Design
© P.E. Allen  2010
LECTURE 300 – LOW VOLTAGE OP AMPS
LECTURE ORGANIZATION
Outline
• Introduction
• Low voltage input stages
• Low voltage gain stages
• Low voltage bias circuits
• Low voltage op amps
• Summary
CMOS Analog Circuit Design,
2
nd
Edition Reference
Pages 415432
Lecture 300 – Low Voltage Op Amps (3/28/10)
Page 3002
CMOS Analog Circuit Design
© P.E. Allen  2010
INTRODUCTION
Implications of LowVoltage, StrongInversion Operation
• Reduced power supply means decreased dynamic range
• Nonlinearity will increase because the transistor is working close to
V
DS
(sat)
• Large values of
±
because the transistor is working close to
V
DS
(sat)
• Increased drainbulk and sourcebulk capacitances because they are less reverse
biased.
• Large values of currents and
W/L
ratios to get high transconductance
•
Small values of currents and large values of
W/L
will give small
V
DS
(sat)
•
Severely reduced input common mode range
• Switches will require charge pumps
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Lecture 300 – Low Voltage Op Amps (3/28/10)
Page 3003
CMOS Analog Circuit Design
© P.E. Allen  2010
What are the Limits of Power Supply?
The limit comes when there is no signal range left when the dc drops are subtracted from
V
DD
.
Minimum power supply (no signal swing range):
V
DD
(min.) =
V
T
+ 2
V
ON
For differential amplifiers, the minimum power
supply is:
V
DD
(min.) = 3
V
ON
However, to have any input common mode range, the
effective minimum power supply is,
V
DD
(min.) =
V
T
+ 2
V
ON
06080201
V
DD
V
PB
1
V
NB
1
M1
M2
M3
M4
+

V
ON
V
T
+
V
ON
+

+

V
T
+
V
ON
V
ON
+

06080202
V
PB
1
V
DD
V
NB
1
+

V
ON
+

V
ON
+

V
ON
+

V
T
+
V
ON
+

V
T
+
V
ON
M1
M2
M3
M4
M5
Lecture 300 – Low Voltage Op Amps (3/28/10)
Page 3004
CMOS Analog Circuit Design
© P.E. Allen  2010
Minimum Power Supply Limit – Continued
The previous consideration of the differential amplifier did not consider getting the signal
out of the amplifier.
This will add another
V
ON
.
06080203
V
PB
1
V
DD
V
NB
1
+

V
ON
+

V
ON
+

V
ON
+

V
T
+
V
ON
+

V
T
+
V
ON
M1
M2
M3
M4
M5
V
PB
1
V
PB
2
M6
M7
M8
M9
+

V
ON
V
T
+
V
ON
+

V
T
Therefore,
V
DD
(min.) =
V
T
+ 3
V
ON
This could be reduced to 3
V
ON
with the floating battery but its implementation probably
requires more than 3
V
ON
of power supply.
Note the output signal swing is
V
T
+
V
ON
while the input common range is
V
ON
.