ex2_f11 - EEL 4744C Dr. Gugel Last...

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Unformatted text preview: EEL 4744C Dr. Gugel Last Name______________________________ First Name ______________ Fall 2011 Exam #2 UFID#__________________________________________ Open book/open notes, 90-minute exam. No electronic devices are required or permitted. All work and solutions are to be written on the exam where appropriate. Point System (for instructor and TA use only) Page 2 14 points _________________ Page 3 12 points _________________ Page 4 22 points _________________ Page 5 10 points _________________ Page 6 8 points _________________ Page 7 33 points _________________ I Brought My Etched Board! 3 points _________________ TOTAL _________________ out of 102 Grade Review Information: ( NOTE: deadline of request for grade review is the day the exam is returned .) Page 2 Page Score = For the following problems you are given a microprocessor with a multiplexed address (A15:0) and data (D15:0) bus. The control bus consists of an AddressStrobe (+AS), DataStrobe (-DS) and a Read/Write (R/-W) signal. See the timing below. 1. Show the required circuitry to de-multiplex the address and data bus. Assume a CPLD is available and label all signals. (6 pt.) 2. Why did the manufacturer of this device multiplex the address and data bus? Best answer = most points! (2 pt.) _________________________________________________________________________________________________ _________________________________________________________________________________________________ 3. The uP is designed such that after reset, the Program Counter is automatically loaded with the first address of the highest 8K block of memory. Thus this section of memory should be filled with an 8Kx16 EPROM or 8Kx16 EEPROM . What is the lowest address in the highest 8K block of memory in hex? (2 pt.) _________________________________________________________________________________________________ 4. A student building a computer unfortunately only has (2) 4Kx8 EPROMs. Assuming that there will be only one image of this block of non-volatile memory in the system, what is the logic equation required to decode this block of memory? /EPROM_CE = (4 pt.) Page 2 Page Score = For the following problems you are given a microprocessor with a multiplexed address (A15:0) and data (D15:0) bus. The control bus consists of an AddressStrobe (+AS), DataStrobe (-DS) and a Read/Write (R/-W) signal. See the timing below. 1. Show the required circuitry to de-multiplex the address and data bus. Assume a CPLD is available and label all signals. (6 pt.) 2. Why did the manufacturer of this device multiplex the address and data bus? Best answer = most points! (2 pt.) _________________________________________________________________________________________________ _________________________________________________________________________________________________ 3. The uP is designed such that after reset, the Program Counter is automatically loaded with the first address of the highest 8K block of memory. Thus this section of memory should be filled with an...
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ex2_f11 - EEL 4744C Dr. Gugel Last...

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