Lab3Spring2012 - Lab 3 Fibonacci Calculator using Nallatech...

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Lab 3: Fibonacci Calculator using Nallatech Platform EEL 4930/5934 – Spring 2012 Objectives: In this lab, you will be implementing a Fibonacci calculator (similar to the one you did in a previous lab) on the Nallatech board and interface it with a software program running on the host processor. Specifically, you will be using the host processor to send inputs to the Fibonacci calculator circuit in the FPGA, and to read back outputs and display them on the screen. What to turn in: Turn in one zip file (per group) using Sakai (make sure all names are in each file ): Naming convention: LastNameInitialLab3.zip (choose last name of any team member) readme.txt explaining the status of the lab DimeTalk project (dt3 file) C files VHDL files Bitfile Screenshot of your testbench output Please do not turn in other files that are generated during synthesis. Part 1 - VHDL/DIMEtalk You are to design and implement the following components using DIMEtalk and VHDL, using the provided code and code templates . Figure 1. Component overview Components : (1) fib: This is Fibonacci calculator that you created in Lab 2. If you want to use your own Fibonacci calculator, that is fine, but I'd recommend starting with the provided solution initially, and then replacing it with your own code later if you have extra time. (2) glue_logic: The glue_logic component is used to coordinate the transfer of data and control signals between the CPU and the fib (VHDL-FPGA) component. Details of glue_logic are discussed below. (3) fib_h101: This is the top-level VHDL component to be placed in DIMEtalk. The fib_h101 component is a “wrapper” component encapsulating the glue_logic and fib components (using PORT MAP). (4) Memory map node: This is a DIMEtalk node used to facilitate the transfer of data and control signals between the CPU and a VHDL component on the FPGA. More details are given below. Additional details : (1) Memory map node: A memory map is a DIMEtalk node that can be used (and functions) like a BRAM : o Like BRAM, a memory map is an array of 32-bit “registers” (i.e., 32-bit locations). Each location has a 32-bit address and can be used to contain some data or control signal
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Lab 3: Fibonacci Calculator using Nallatech Platform EEL 4930/5934 – Spring 2012 to be exchanged between the CPU and a VHDL component on the FPGA. In general, it doesn't matter what address you choose. To make sure everyone uses addresses that will work with the provided testbench, you should use the following addresses
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This note was uploaded on 03/27/2012 for the course EEL 4930 taught by Professor Staff during the Spring '08 term at University of Florida.

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Lab3Spring2012 - Lab 3 Fibonacci Calculator using Nallatech...

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