countercoding - - ECE337 Counter example code - Practically...

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-- ECE337 Counter example code -- Practically any counter you need can be built from this template. -- The next state logic determines when the counter is allowed to increment. -- The output logic generates any outputs that need to be derived from the -- value of the count. -- You can make this code even easier to write by using an integer type -- (be sure to specify the range of values) for the state and nextstate -- signal. -- 1/29/09 - actually since std_logic_vector supports increment/decrement -- operations, the benefit of using integers is not a great LIBRARY IEEE; USE IEEE.std_logic_1164.ALL; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity cnt10xmpl is port( clk, nrst, I: in std_logic; F: out std_logic); end cnt10xmpl; architecture behavioral of cnt10xmpl is signal state, nextstate : std_logic_vector(3 downto 0); Begin -- This process implements the register that stores the count value. -- DO NOT MODIFY IT. The only things you should be changing are in the -- next state and output logic. StateReg : process (clk, nrst) begin -- WARNING - nrst is an "asynchronous" reset. consequently, nrst -- should only be taken from an external reset pin on your chip -- that is meant to serve as a power-on reset. DO NOT derive nrst -- from any other signal on your chip. if (nrst = '0') then
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This note was uploaded on 03/28/2012 for the course ECE 337 taught by Professor J during the Fall '09 term at Purdue University-West Lafayette.

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countercoding - - ECE337 Counter example code - Practically...

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