ECE337 Spring 2007

ECE337 Spring 2007 - ECE337 Spring 2007, Code for block...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
ECE337 Spring 2007, Code for block diagram drawing example -- Customer ticket counter such as used at drivers license bureau -- UPSW, DNSW = inputs from 16 "up" buttons and 16 "down" buttons -- SEGS1, SEGS2 = two digit 7-segment display outputs entity ServiceCounter is port(UPSW, DNSW: in std_logic_vector(15 downto 0); CLK, RST: in std_logic; SEGS1, SEGS2; out std_logic_vector(6 downto 0)); end ServiceCounter; architecture mixed of ServiceCounter is signal upsw1,upsw2,dnsw1,dnsw2: std_logic_vector(15 downto 0); signal upedge,dnedge: std_logic_vector(15 downto 0); signal upcnt,dncnt,upreq,dnreq,upcy,dncy: std_logic; signal dig1,dig2: std_logic_vector(3 downto 0); -- Be sure to look at the source code for this component component UpDnCounter port(up,dn,clk,rst: in std_logic; cnt: out std_logic_vector(3 downto 0); cyover, cyunder: out std_logic); end component; Is this blockcombinational? -- Source code omitted component Decode7Seg port(bin: in std_logic_vector(3 downto 0); segs: out std_logic_vector(6 downto 0));
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 03/28/2012 for the course ECE 337 taught by Professor J during the Fall '09 term at Purdue.

Page1 / 5

ECE337 Spring 2007 - ECE337 Spring 2007, Code for block...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online