rtlexcercise - ECE 337 Spring 2011 RTL Exercise Solution 1....

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ECE 337 Spring 2011 RTL Exercise Solution 1. Top Level Diagram
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ECE 337 Spring 2011 2. Top Level Block Descriptions Synchronizer (Synch.): Simple two-stage two-input synchronizer. Controller: Finite-State-Machine that controls the counters and clock divider used to track the time elapsed from when the start/pause button is pushed as well as the clearing of the elapsed time when the restart button is pushed. 100x Clock Divider: This block generates a one cycle pulse every 100 clock cycles. 0.1 Seconds Counter: This block counts the number of 0.1 seconds that pass and outputs the 0.1 second digit for the display. It also outputs a one-cycle pulse every time one second has elapsed. Seconds Counter Ones Digit: This block counts the number of seconds that elapse and outputs the ones digit for the seconds section of the display value. It also outputs a one-cycle pulse every time 10 seconds have elapsed.
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This note was uploaded on 03/28/2012 for the course ECE 337 taught by Professor J during the Fall '09 term at Purdue University-West Lafayette.

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rtlexcercise - ECE 337 Spring 2011 RTL Exercise Solution 1....

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