eei200.ch7

eei200.ch7 - U niversityOfHail CommunityCollege

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University Of Hail Community College Electrical Engineering Department Electronics Engineering and Instrumentation Program Digital Circuits II (EEI 200) Dr. Fawzy Hashem Date: LATCHES AND FILP FLOPS LATCHES: A latch is a temporary storage device that has two stable states (bistable). It is a basic form of memory. The S-R (Set-Reset) latch is the most basic type. It can be constructed from NOR gates or NAND gates. With NOR gates, the latch responds to active-HIGH inputs; with NAND gates, it responds to active-LOW inputs. Logic diagrams and symbols are shown bellow: The active-HIGH S-R latch is in a stable (latched/no change) condition when both inputs are LOW. The active-LOW S-R latch is in a stable (latched/no change) condition when both inputs are HIGH. Assume an active-HIGH latch is initially RESET ( Q = 0) and the inputs are at their inactive level (0). To SET the latch ( Q = 1), a momentary HIGH signal is applied to the S input while the R remains LOW. To RESET the latch ( Q = 0), a momentary 1
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This note was uploaded on 03/24/2012 for the course ECE 322097 taught by Professor Staff during the Spring '08 term at Drexel.

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eei200.ch7 - U niversityOfHail CommunityCollege

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