ch 5 Marcovitz_Ch5_Solutions_Fall2011_partA

ch 5 Marcovitz_Ch5_Solutions_Fall2011_partA - EC262 Digital...

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1 EC262 Digital Systems Fall 2011 Chapter 5 Solutions Textbook: Marcovitz, Introduction to Logic Design , 3 rd ed. Exercise 1, Exercise 2, Exercise 5, Exercise 7, Exercise 8, Exercise 9. Exercise 1 : For the given circuit a. Compute the maximum delay, i. both uncomplemented and complemented. ii. only uncomplemented inputs are available. i. (both uncomplemented and complemented inputs are available) ii. (only uncomplemented inputs are available) b. Compute the maximum delay for C to the output. Exercise 2: An adder to add a 32-bit constant (10101010101010101010101010101010) to an arbitrary 32-bit number
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2 a. Show a truth table for a 2-bit adder c a b 1 0 y s t abc y x t 000 001 010 011 0 0 0 1 1 1 1 0 0 1 1 0 100 101 110 111 1 1 1 1 0 0 0 1 0 1 1 0 Find the minimum SOP expressions for each output y = a + b c s = a' b' + a' c' + a b c t = b' c + b c' b. Compute the delay form the c of each module to the y output of that module and the total delay. The delay from c to y is 2 for each module. The total delay is 32 + 1 (where the extra delay is in the last module).
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3 Exercise 5: Design a circuit to multiply two 2-bit numbers (ab and cd) and produce a 4-bit product (wxyz). Show
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