427-CAD1 - CAD1 Inverter/Nand/2:1 Mux Assignment Create...

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CAD1 Inverter/Nand/2:1 Mux Assignment Create schematics, symbols, and layouts for an inverter and a 2-input nand gate. Using these symbols and layouts, create a schematic, symbol, and layout for a 2:1 mux using 3 2-input nand gates and 1 inverter. Perform design-rule-checks (DRC) and a layout-vs.-schematic (LVS) check on the layouts of the inverter, 2-input nand, and 2:1 mux. Then, get accurate propagation delays for the 2:1 mux by extracting parasitic capacitances from the layout and simulating the circuit with Eldo. Add the resultant rise and fall propagation delays to your schematics and re- simulate in Modelsim. You probably will not use any of these cells in your final project, so don’t be concerned about choosing the "right" cell height or choosing optimal transistor sizes. Try to minimize area and feel free to use all layers available to you. While layout area will be considered in grading, do not spend a lot of time optimizing the layout to save on area. The first two cad assignments are to be done on your own. You may discuss use of the cad tools and basic layout concepts with other students, but your design, particularly your layout, should be created by yourself. Description Create a directory in your class account called cad1 . All of your files will need to be in this directory in order to be graded. Make the schematics and symbols for the inverter and 2-input nand using Design Architect ( da ). Call the inverter ports in and out . Call the nand ports in0 , in1 , and out . Simulate the inverter and nand in Modelsim and verify correct functionality. Test all possible inputs for both gates. Create the input stimulus as you did in the inverter tutorial, by creating a small verilog module that instantiates the device under test and forces the inputs. For example, you might have a file called testnand.v containing a module testnand that instantiates nand2. Follow the guidelines of The Design and Simulation of an Inverter to create layouts for the inverter and 2-input nand. Make sure that you use the same names to label the inputs and outputs of the gates in IC Station that are used on the symbol. Keep in mind when designing these gates that they will be used in the layout of the 2:1 mux. Examples of things to keep in mind: (1) How will you route between the 4 cells? (2) How will you place the cells to create a 2:1 mux? (3) Where will you place your input
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This note was uploaded on 04/01/2012 for the course EECS 427 taught by Professor Prof during the Spring '12 term at University of Michigan-Dearborn.

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427-CAD1 - CAD1 Inverter/Nand/2:1 Mux Assignment Create...

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