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427-CAD5 - EECS 427 CAD5 The Shifter Assignment To design a...

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EECS 427 1 CAD5 The Shifter Assignment To design a 16-bit shifter for your microprocessor. Description The shifter is an essential element for many microprocessor operations. It may be used to align or scale data, manipulate bits and bytes, or in an automatic or program-controlled shift-and-add multiply function. In the baseline machine, you are required to implement only a Logical Shift, which shifts data in a register (dest) as specified by a signed count operand (twos complement). A positive count specifies a left shift; a negative count specifies a right shift. You must support a shift amount contained in a register or the imme- diate field of the instruction. All bits shifted out of the destination register are lost. All destination bits not mapped from the original operand are filled with zeros. Other common shift functions, which you may want to add to your processor, depending upon your appli- cation, are arithmetic shifts, arithmetic shift including the carry bit, byte swap, and rotate. In right arithmetic shifts, the high-order bits are filled with the original sign bit. To shift the contents of a register one bit per clock cycle, an ordinary shift register, which can be assembled from cascaded D-latches, could be used. However if there is a need to shift data by an arbitrary number of bit positions within one clock cycle, a dedicated, programmable shifter is required. Two frequently used approaches are (i) Barrel Shifters, and (ii) Logarithmic Shifters. While the barrel shifter implements the whole shifter as an array of pass transistors or multiplexers, the logarithmic shifter uses a staged approach. In general, barrel shifters are appropriate for small shift width and logarithmic shifters are more suitable for shifters of large width. Both types of shifter can be implemented in full CMOS transmis- sion gates or nmos pass gates. Nmos pass gate designs can benefit from level restorers to avoid problems associated with Vt drops.. Shifters should be disabled in low-power designs when they are not in use.
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