20115eeM16_2_Homework7

20115eeM16_2_Homework7 - UCLA Department of Electrical...

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UCLA Department of Electrical Engineering EEM16 – Fall 2011 Homework 7 Due Dec 1, 2011 (This homework contains 6 problems) Problem 1 Ex 10.6 Determine the function implemented by the network shown in Figure 10.20, and design an equivalent network that uses fewer modules. Problem 2 Ex 10.10 Complete the following table Signed integer (in decimal) Representation (in decimal) Bit-vector a -37 b 205 c 11011 d 9 for a. Two’s complement, n = 7 bits b. One’s complement, n = 8 bits c. Two’s complement, n = 5 bits d. Two’s complement, n = 8 bits
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Problem 3 Ex 10.12 For the following pairs of 8-bit vectors and ± representing integers in the two’s complement system, obtain the eight-bit vectors ² and ³ representing ² ´ µ ± and ³ ´ ¶ ± , respectively. Perform the operation directly on the bit-vectors using the two’s complement arithmetic unit (Figure 10.12) presented in this chapter. That is, show the values of control signals, · ¸ , and the bit-vectors at the output of the complementer and at the output of the adder, as well as the conditions ovf , zero and sign.
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Verify that you have obtained the correct result. ± 01010011
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This note was uploaded on 04/02/2012 for the course EE EEM16 taught by Professor Cabriv during the Fall '11 term at UCLA.

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20115eeM16_2_Homework7 - UCLA Department of Electrical...

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