M16_2_EEM16_F11_L09

# M16_2_EEM16_F11_L09 - EEM16/CSM51A Logic Design of Digital...

This preview shows pages 1–6. Sign up to view the full content.

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: EEM16/CSM51A: Logic Design of Digital Systems Lecture #9 Ch 7: Sequential Systems Specifications Prof. Danijela Cabric Fall 2011 Agenda ¡ Synchronous sequential systems ¡ Mealy and Moore machines ¡ Time behavior ¡ State minimization 2 Definition ¡ A type of logic circuit whose output depends not only on the present input but also on the history of the input ¡ By contrast, in combinational logic output is a function of, and only of, the present input ¡ In other words, sequential logic has storage or memory while combinational logic does not ¡ Most practical computer circuits are a mixture of combinational and sequential logic 3 Clock ¡ Clock Period: time interval between pulses ¡ 10 ns in the above signal ¡ Clock Frequency: 1/period ¡ 1 / 10 ns = 100 MHz in the above signal ¡ High and Low durations may not be the same 4 Synchronous and Asynchronous Systems ¡ In synchronous systems, the signals may be represented as a sequence of values at the clock ticks ¡ So instead of y(t1, t2) as a waveform, one can write it as a sequence ¡ E.g. y(2, 5) = aabc, or y(2, 5) = 1021, or y(2, 5) = 1001 5 Specifying Sequential Systems...
View Full Document

{[ snackBarMessage ]}

### Page1 / 29

M16_2_EEM16_F11_L09 - EEM16/CSM51A Logic Design of Digital...

This preview shows document pages 1 - 6. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online