cse325_S12_set_5_timer

cse325_S12_set_5_timer - 7/23 Timers in Coldfire Processor...

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Unformatted text preview: 7/23 Timers in Coldfire Processor Computer Science & Engineering Department Arizona State University Tempe, AZ 85287 Dr. Yann-Hang Lee yhlee@asu.edu (480) 727-7507 General Purpose Timer q The basic unit counter (up or down) v a clock source v generate timing events (interrupts or timer output) if overflow or reach 0 if match with a preset value v measure time read counter values (captured) v free running, reset or reload, compare binary counter clock (external or internal) control circuit set 5 -- 2 Measurement q Input-capture : identify the moment that an event occurs v latch the counter value when triggered v CPU can read the value later q Output compare : control the timing of output bit v CPU sets a value in output compare register v compare with counter every clock cycle v if equal, send an output signal q External event counting q Measuring elapsed time, pulse width, frequency, and period binary counter input capture register clock load interrupt or ready flag event edge detection set 5 -- 3 Hardware Timer...
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cse325_S12_set_5_timer - 7/23 Timers in Coldfire Processor...

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