Homework 7 - HOMEWORK 7, SECTION 1 and 2, DUE WED 28 at...

Info iconThis preview shows pages 1–2. Sign up to view the full content.

View Full Document Right Arrow Icon
HOMEWORK 7, SECTION 1 and 2, DUE WED 28 at 5:00 pm mailbox located in EE002 Κ ν 2 Λ 1) An NMOS transistor has parameters V TN = 0.8V, k’ n = 40 μ A/V 2 , and λ = 0, (a) Determine the width-to-length ratio (W/L) such that g m = 0.5 mA/V at I D = 0.5mA when biased in the saturation region. (b) Calculate the required value of V GS . 2) A PMOS transistor has parameters V TP = -1.2V, k’ p = -20 μ A/V 2 , and λ = 0, (a) Determine the width-to-length ration (W/L) such that g m = 50 μ A/V at I D = -0.1mA when biased in the saturation region. (b) Calculate the required value of VSG. 3) An NMOS transistor is biased in the saturation region at a constant V GS . The drain current is I D = 3mA at V DS = 5V and I D = 3.4mA at V DS = 10V. Determine λ and r d . 4) The minimum value of small-signal resistance of a PMOS transistor is to be r d = 100 k . If Ι D = -3mA at V DS = -5V and I D = -3.4mA at V DS = -10V. Determine λ p and then the maximum I D for r d at V DS = -10V 5)
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 2
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 04/01/2012 for the course ECE 255 taught by Professor Staff during the Fall '08 term at Purdue University-West Lafayette.

Page1 / 3

Homework 7 - HOMEWORK 7, SECTION 1 and 2, DUE WED 28 at...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online