lecture05_2 - Design and Implementation of VLSI Systems(EN1600 lecture05 Sherief Reda Division of Engineering Brown University Spring 2008[sources

lecture05_2 - Design and Implementation of VLSI...

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Design and Implementation of VLSI Systems (EN1600) lecture05 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley]
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Summary of Terminology body diffusion (n/p) source drain well tap contact metal track via polysilicon gate length/width gate oxide channel All these structures must obey the dimensions and separation rules dictated by the process fabrication facility
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Process design rules Design rules change from fab to fab Fab examples: IBM, Intel, TI, TSMC, UMC, MOSIS Design rules change according
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Unformatted text preview: to the process technology Lambda rules • Feature Size: minimum distance between source and drain of transistor • Feature size = 2λ (@ 90nm feature size λ=45) • According to Moore’s Law, how much does the feature size scale by every ~2 years? Design rules and gate layout • Lambda rules are conservative More design rules More and more design rules Inverters with taps Layout of a 3-input NAND gate Stick diagrams • No need to be drawn to scale Pitch of routing tracks Gate area estimation...
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  • Spring '12
  • aaa
  • Brown University, Wafer, design rules, vlsi systems, Division of Engineering, Sherief Reda

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