2Sections5.1Immediate and register addressing modes5.2Accessing memory using various address modes
3Objective•The CPU can access data in various way.The datacould be in a register, or in memory either RAMor ROM or be provided as immediate value.•These various ways of accessing data of 8051 ICare called Addressing Modes.
4Section 5.1Immediate and Register AddressingModes
5What is Addressing Mode•The CPU can access data in various ways.•The data could be in a register, or inmemory （RAM or ROM （, or be provided asan immediate value.•These various ways of accessing data are calledaddressing mode.
6Addressing Mode in the 8051•Five addressing mode in the 8051 （1. immediate2. register3. direct4. register indirect5. indexed
7Addressing Mode 11. immediate （the operand is a constantMOV A,#01FH2. register （the operand is in a registerMOV A,R03. direct （access the data in the RAM withaddressMOV A,01FH4. register indirect （the register holds the RAMaddress of the dataMOVA,@R05. indexed （for on-chip ROM access
8Immediate Addressing Mode•The source operand is a constant.•When the instruction is assembled, the operandcomes immediately after the opcode.•The immediate vale can be loaded into any of theregisters.–The immediate data must be preceded by the poundsign, ‘ （’.–The immediate value is bounded by the size of register.–Please use the simulation tools to find the the machinecode and the content of registers after execution.–See Tables 10 （11 (page 418).
11EQU•The EQU directive is used in the immediateaddressing mode.1 0000ORG 0H2 0000COUNTEQU303 0000 7C1EMOV R4,#COUNT4 0002 9002 00MOV DPTR,#MYDATA5 0200ORG 200H6020041 6D 65 72 69 MYDATA DB "America"7 0207END
12Addressing Mode 21. immediate （the operand is a constantMOV A,#01FH2. register （the operand is in a registerMOV A,R03. direct （access the data in the RAM withaddressMOV A,01FH4. register indirect （the register holds the RAMaddress of the dataMOVA,@R05. indexed （for on-chip ROM access
13Register Addressing Mode•Register addressing mode involves the use ofregisters to hold the data.–The source and destination registers must match in size.–The movement of data between Rn registers is notallowed. “MOV R4,R7” is illegal.•You can find that the opcode in register addressingmode is short （
14Example of Register Mode （1/2 （•Register Mode （1 0000E8MOV A,R02 0001FAMOV R2,A3 00022DADD A,R5•Instruction Opcodes in Table 11Hex codeMnemonicOperandsByteE8MOVA,R01FAMOVR2,A12DADDA,R51