EE101-U3-BooleanAlgebra-Nazarian-Spring12

# EE101-U3-BooleanAlgebra-Nazarian-Spring12 - EE101...

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EE101 Introduction to Digital Logic Boolean Algebra Logic Functions Canonical Sums/Products Shahin Nazarian Spring 2012 Reference: Professor Redekopp’s Notes and slides

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Shahin Nazarian/EE101/Spring 2012 Gates Gates can have more than 2 inputs but the functions stay the same AND = output = 1 if ALL inputs are 1 Outputs 1 for only 1 input combination OR = output = 1 if ANY input is 1 Outputs 0 for only 1 input combination X Y Z F 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 X Y Z F 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 1 3-input AND 3-input OR F x y z F x y z 2
Shahin Nazarian/EE101/Spring 2012 Checkers / Decoders An AND gate only outputs ‘1’ for 1 combination That combination can be changed by adding inverters to the inputs We can think of the AND gate as “checking” or “decoding” a specific combination and outputting a ‘1’ when it matches X Y Z F 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 F x y z X Y Z F 0 0 0 1 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 0 F x y z AND gate decoding (checking for) combination 101 AND gate decoding (checking for) combination 000 3

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Shahin Nazarian/EE101/Spring 2012 Checkers / Decoders An OR gate only outputs ‘0’ for 1 combination That combination can be changed by adding inverters to the inputs We can think of the OR gate as “checking” or “decoding” a specific combination and outputting a ‘0’ when it matches OR gate decoding (checking for) combination 010 X Y Z F 0 0 0 1 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 1 F x y z OR gate decoding (checking for) combination 110 X Y Z F 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 0 1 1 1 1 F x y z 4
Shahin Nazarian/EE101/Spring 2012 Using Decoders to Implement Functions Given any logic function, it can be implemented with the superposition of decoders/checkers X Y Z F 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 5

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Shahin Nazarian/EE101/Spring 2012 Using Decoders to Implement Functions Given any logic function, it can be implemented with the superposition of decoders X Y Z F 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 X Y Z A 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 0 x y z A 6
Shahin Nazarian/EE101/Spring 2012 Using Decoders to Implement Functions Given any logic function, it can be implemented with the superposition of decoders X Y Z F 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 X Y Z A B 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 1 0 0 1 0 0 0 1 1 0 1 0 0 1 1 0 0 0 1 1 1 0 0 x y z z y x A B 7

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Shahin Nazarian/EE101/Spring 2012 Using Decoders to Implement Functions Given any logic function, it can be implemented with the superposition of decoders X Y Z F 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 X Y Z A B C 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 1 1 0 0 0 1 0 0 0 1 0 1 0 1 0 0 0 1 1 0 0 0 0 1 1 1 0 0 1 x y z z y x z y x A B C 8
Shahin Nazarian/EE101/Spring 2012

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