Analog Integrated Circuits (Jieh Tsorng Wu)

Adc averaging preampliers c r adcs using input offset

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Unformatted text preview: Folding Charge-Redistribution ADC Averaging Preamplifiers C-R ADCs Using Input Offset Storage Technique Effects of Averaging Self-Calibrating Charge-Redistribution ADCs Bending at the Edges Due to Averaging Quantized-Feedforward (Subranging) Architectures Cascaded Folding Quantized-Feedforward Minimal Design Differential Preamplifier Over-Range in the Minimal Design A CMOS 10-Bit Folding ADC - Bult Quantized-Feedforward Redundant Design Time-Interleaved Architectures 26.Oversampling Converters Sampling and Quantization General Mismatch-Shaping DAC - First-Order Example Oversampling General Mismatch-Shaping DAC - SecondOrder Example First-Order Ó Modulator Multi-Bit Unit Elements First-Order Ó Modulator Decimation and Interpolation First-Order Ó Modulator with SC Circuit Implementation Multi-Stage Rate Conversion sinck Filters Circuit Considerations Second-Order Ó Modulator Integration Range in a Second-Order Ó Modulator Integration Range in a Second-Order Ó Modulator 27. Phase-Locked Loops Phase-Locked Loops (PLLs) Basic Model Second-Order PLL - Active Lag-Lead Filter Second-Order PLL - Passive Lag-Lead Filter Overloading in a Second-Order Ó Modulator Oversampling ADCs High-Gain Second-Order PLL Frequency Response General Single-Stage Ó Modulator Step Response of a Two-Pole System General Single-Stage Error-Feedback Coder Phase Jitter Single-Stage High-Order Modulators Phase Noise Stability of Single-Stage High-Order Modulators PLL Noise Response Multi-Stage Cascaded Modulators Phase Detection Using Analog Multiplier PLL Tracking Performance - Hold-In Range A Third-Order (1-1-1) Cascaded Modulators PLL Tracking Performance - Pull-Out Range Idle Channel Tones (Pattern Noises) Noisy PLL Tracking Performance Noise-Shaped Dithering for Single-Stage Modulators PLL Acquisition Behavior Phase Acquisition of a First-Order Loop Noise-Shaped Dithering for Multi-Stage Cascaded Modulators Phase Acquisition of a Second-Order Loop Multi-Bit Ó Modulator Frequency Acquisition - The Pull-In Process Multi-Bit DAC - Dynamic Element Matching Aided Frequency Acquisition - Frequency Sweeping Multi-Bit DAC - Data-Weighted Averaging Multi-Bit DAC - Noise-Shaped Scrambler Aided Frequency Acquisition - Loop Filter Switching General Mismatch-Shaping DAC Aided Frequency Acquisition - Dual Loops Digital Phase-Locked Loops (DPLLs) XOR Phase Detector Edge-Triggered Set-Reset Phase Detector Sequential Phase-Frequency Detector (PFD) Charge-Pump Phase-Locked Loops PFD and Charge-Pump Filter PFD with Delayed Reset Third-Order Charge-Pump PLLs Multi-Path Charge-Pump Filter Analog Integrated Circuits Jieh-Tsorng Wu ES A July 17, 2002 1896 National Chiao-Tung University Department of Electronics Engineering Copyright c 2001 by Jieh-Tsorng Wu • All Rights Reserved. • Unmodified reproduction of these lecture notes for class or personal use is permitted. • For commercial use, permission should be obtained from the author. Contents 0-2 Analog ICs; Jieh-Tsorng Wu Devices and Technologies 1. Introduction 2. PN Junctions and Bipolar Junction Transistors 3. MOS Transistors 4. Integrated Circuit Technologies Contents 0-3 Analog ICs; Jieh-Tsorng Wu Basic Circuits and Design Techniques 5. Single-Transistor Gain Stages 6. Multiple-Transistor Gain Stages 7. Differential Gain Stages 8. Current Mirrors and Active Loads 9. Voltage and Current References 10. Output Stages 11. Noise Analysis and Modelling 12. Feedback and Compensation Contents 0-4 Analog ICs; Jieh-Tsorng Wu Operational Amplifiers 13. Basic Two-Stage Operational Amplifier Design 14. Operational Amplifiers with Single-Ended Outputs 15. Fully Differential Operational Amplifiers Contents 0-5 Analog ICs; Jieh-Tsorng Wu Analog Functional Blocks 16. Operational Amplifiers and Their Basic Configurations 17. Analog Switches and Sample-and-Hold Circuits 18. Comparators and Offset Cancellation Techniques 19. Oscillators Contents 0-6 Analog ICs; Jieh-Tsorng Wu Subsystems 20. Fundamentals of Analog Filters 21. Active-RC Filters 22. MOST-C and Gm-C Filters 23. Switched-Capacitor Filters 24. Niquist-Rate Digital-to-Analog Converters 25. Niquist-Rate Analog-to-Digital Converters 26. Oversampling Converters 27. Phase-Locked Loops Contents 0-7 Analog ICs; Jieh-Tsorng Wu Introduction Jieh-Tsorng Wu ES A July 16, 2002 1896 National Chiao-Tung University Department of Electronics Engineering Analog Integrated Circuits Power Source Transmission Media Wire Pairs Coax Fiber RF Storage Media Disk Tape Bubble Physical Sensors & Actuators VLSI Digital System Imagers & Displays Audio I/O Analog/Digital Interfaces • Usually integrated with digital VLSI circuits monolithically (mixed-signal integrated circuits) for better performance and/or lower cost. Introduction 1-2 Analog ICs; Jieh-Tsorng Wu Analog Signal Processing Analog Signals • Always continuous in amplitude. • Either continuous in time (s-transform) or discrete in time (z-transform). Analog circuits provide interfaces between the analog environment of the physical world and a digital enviro...
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This note was uploaded on 03/26/2013 for the course EE 260 taught by Professor Choma during the Winter '09 term at USC.

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