Unformatted text preview: + λV ) 7
1 − λVDD
9 • The oscillation frequency fo can be varied by changing VDD . OSCs 195 Analog ICs; JiehTsorng Wu FourStage Diﬀerential Ring Oscillator VDD R R
V1a V1b
M1 VB OSCs M2 C C R R
V2b
V2c Vmin Vc
t M5
IS Vmax Vb V2a Va IS 196 Analog ICs; JiehTsorng Wu FourStage Diﬀerential Ring Oscillator
From the Barkhausen criteria,
ωo
ωp −1 tan = 45◦ ωp = RC ⇒ ωo = ωp 4 A0
1+ ωo
ωp 2 4 =1 ⇒ A0 = gmR = 2 The delay stage is usually designed to experience complete switching, i.e.,
Vmax = VDD OSCs Vmi n = VDD − IS R 197 ∆V = Vmax − Vmi n = IS R Analog ICs; JiehTsorng Wu Diﬀerential Delay Stage
Let
∆V = IS R Vt = Vt1 = Vt2 2(IS /2) Vov = Vov 1 = Vov 2 = µCox (W/L)1,2 • To maintain M1 and M2 in the forwardactive region, IS R < Vt1,2.
√
• For complete switching, want ∆V > 2Vov ⇒ √ Vov < ∆V/ 2. √
• For enough loop gain, want gmR = [(IS /2)/(Vov /2)] · R > 2 ⇒ Vov √
< ∆V/ 2. • The minimum VDD can be approximated by
VDD,mi n ≈ Vov 5 + Vt + Vov + OSCs 198 ∆V
2 Analog ICs; JiehTsorng Wu Delay Variation Using Variable Resistors
MB1=M3=M4 and MB2=M5, VDD
MB1
VR Vcb ∆V = VDD − VR ≈ IS Ron M3 M4 Vb
M1 Va
M2 A0 = gm1,2Ron
∆V
=
IS MB2
Vct IS
≈
ωp =
RonC ∆V · C
1 IS 2µnCox W
L IS
1,2 M5 = ∆V
IS 2µnCox W
L 1,2 • MB1, M3, and M4 are biased in the triode region.
• A0 decreases at higher oscillation frequencies.
OSCs 199 Analog ICs; JiehTsorng Wu Delay Variation Using Positive Feedback
VDD
IT Vct1 R1 R2
Va
Vb Vct2
M1 VB1 IT = IS 1 + IS 2
gm1,2 =
OSCs ∆V = IT R1,2 M3 M5
IS1 VB1 VB2 M2 VB2 C
ωp =≈
G1,2 − gm3,4 2µnCox (W/L)1,2 IS 1 gm3,4 = 1910 A0 ≈ M4 M6
IS2 gm1,2
G1,2 − gm3,4 2µnCox (W/L)3,4 IS 2
Analog ICs; JiehTsorng Wu Delay Variation Using Interpolation
VDD
R1 R2
Va
Vb VDD
M1 M2
R3 R4 IS1
Vin1 M3
M5 M4 M6
IS2 Vin2
IS IS 1 + IS 2 = Constant
OSCs 1911 Analog ICs; JiehTsorng Wu LCTuned Delay Stage
H
gm R VDD L C R ω 1
ωr = √
LC Vo
(−H) Vi o
90 Q = ωr RC = ω
o
90 H (s) = OSCs Vo(s)
Vi (s) = ωr
gm (sL)−1 R
ωr L + sC + 1/R 1912 1
Q = gm R ·
s
ωr 2 s
ωr 1
+Q s
ωr +1 Analog ICs; JiehTsorng Wu LCTuned Delay Stage
In the frequency domain
H (j ω) = gmR · 1
1 + jQ ω
ωr − ωr
ω = gmR · A(j ω) • A(j ω) is a bandpass function with −3 dB frequencies at ω1 and ω2, and bandwidth
B = ω2 − ω1.
ωr
R
2
= ω2RC =
B=
ω1 · ω2 = ωr
r
Q
L
• If ∆ω = ω − ωr ωr , we have
A(j ω) ≈ 1
1 + j 2Q · ∆ω
ω
r OSCs 1913 Analog ICs; JiehTsorng Wu LCTuned Ring Oscillators
VDD L VDD C R L C V1
M1 VDD R R C V2 L L
V1 M2 M1 C R V2
M2 √
• Oscillation frequency is ωo = ωr = 1/ LC .
• V1 and V2 are 180◦ out of phase.
• Need gmR > 1 to start oscillation.
• Varactors, such as pn junctions with reverse bias or MOSTs in the accumulation
mode, are used for ωo variation.
OSCs 1914 Analog ICs; JiehTsorng Wu Colpitts Oscillator
VDD L C Vo
C1 R
Vo VB L C R V1 C1 gm
s C2 C2 gm
Vo C2
C1 L C R 1:N N OSCs C1 C2 C2 C1 1915 Analog ICs; JiehTsorng Wu Colpitts Oscillator
• The oscillation frequency is
ωo ≈ ωr = 1
LCp Cp = C + (C1 C1 C2
C2) = C +
C1 + C2 • The loop gain at ωr is
T (j ωr ) = gm
G+ gm
N2 gm
1
·=
N G · N + gm
N Want
T (j ωr ) > 1
• If C1 OSCs ⇒ gmR > N + gm R
N C2, i.e., N ∼ 1, oscillation cannot occur.
1916 Analog ICs; JiehTsorng Wu OnePort Oscillators
I I L C G 0 f(V) V 0 dV
1
V dt + C
+ G · V + f (V ) = 0
L
dt ⇒ V dV 2
d
LC
+ L [G · V + f (V )] + V = 0
dt
dt • For smallsignal analysis, let f (V ) = −a · V with a = − d f (V )/d V V =0 . Then, we have LCs2 + L(G − a)s + 1 = 0
G−a
s1, s2 = −
±j
2C 1
G−a
−
LC
2C 2 = α ± jβ ⇒ V (t ) ≈ Aeα cos βt Need a > G to start oscillation.
OSCs 1917 Analog ICs; JiehTsorng Wu The van der Pol Approximation
√
Let T = t/ LC, we have
2 dV
+
2
dT Ld
·
[F (V )] + V = 0
C dT F (V ) = G · V + f (V ) The van der Pol approximation for F (V ) is
Fv (V ) = −a1 · V + b1 · V 3
Vx a1 = a − G F v (V) ±Vx = ± V
V V V max
Vx
OSCs 1918 = − = L
·a =
C1 a1
b1 1 a1
·
3 b1
L
· (a − G )
C Analog ICs; JiehTsorng Wu The van der Pol Approximation
For nearsinusoidal oscillations, 4 a1
·
3 b1 v (t ) = 1+ • At the start of oscillation, e
V (t ) = Ae t cos √
LC t 1 √
−(t−t0 ) / LC √
t/(2 LC ) → 0. > 0 and √
−(t−t0 ) / LC
e cos √
LC 1, we have = Ae T/2 cos T 4 a1 −
·e
3 b1 A= √
t0 /(2 LC) • In steady state, t → ∞,
V (t ) =
Vmax =
OSCs 4 a1
t
cos √
3 b1
LC
4 a1
=
3 b1 = Vmax cos T 4
· Vx = 1.15Vx = 2V −
3 1919 Analog ICs; JiehTsorng Wu A CMOS SONY Oscillator
VDD L C I G
Vo IS
2 Io M1 V = Vo − VB 0 VDD IS
I = Io −
2 f(V) VB M2
V
VIM IS k
I = f (V ) = V
4 OSCs 4IS
−V2
k VIM = 1920 VIM 2IS
k k = µCox W
L 1,2 Analog ICs; JiehTsorng Wu Diﬀerential CMOS SONY Oscillators
VDD VDD 2L
L C GG C C/2 L G/2
Io Vo Io M1 M2 M1 IS V = Vo OSCs I = Io Vo M2 IS k
I = f (V ) = V
4 1921 4IS
−V2
k k = µCox W
L 1,2 Analog ICs; JiehTsorng Wu SingleTransistor Negative Resistance Generator
Ix Ix Vx Rx
Vx C1
C2 Cx
Ix −Ix
Ix
1
Vx = Ix −
· gm
+
sC2
sC1 sC2
Rx = − OSCs gm
ω2C1C2 ⇒
Cx = C1 1922 V...
View
Full Document
 Winter '09
 Choma
 Integrated Circuit, Transistor, The Land, Bipolar junction transistor, VDS, Analog ICs, JiehTsorng Wu

Click to edit the document details