Analog Integrated Circuits (Jieh Tsorng Wu)

Feedback 12 28 analog ics jieh tsorng wu dominant pole

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Unformatted text preview: ro RC + RF + rπ = −RF = rπ gm vbe d= RF vo ii n sout soc = gm = 0 = si n =0 12-17 rπ rπ + RF + ro RC vo ioc ii n = 0 = −[ro RC (RF + rπ )] Analog ICs; Jieh-Tsorng Wu A Transresistance Feedback Amplifier The closed-loop gain is si c d R A = A∞ + = 1 + R 1 + R si n sout sout ·k · soc =0 · si n =0 d 1 + 1+R 1+R The output resistance is 1 + R(port X shorted) 1 + R(output shorted) Ro = RX (k = 0) · = Ro(gm = 0) · 1 + R(port X open) 1 + R(output open) Ro(gm = 0) = ro RC R(output shorted) = 0 Feedback 12-18 (RF + rπ ) R(output open) = R Analog ICs; Jieh-Tsorng Wu Frequency Response of Feedback Amplifiers S Si a(s) So Sf b f So a(s) A(s) = = Si 1 + a (s ) × f Feedback 12-19 Analog ICs; Jieh-Tsorng Wu Single-Pole Model jω a(s) = ao T o = ao · f To=0 1 − s/p1 ao 1 × A(s) = 1 + aof 1 − (1+as f )p o s-plane σ (1 + T o ) p 1 1 p 1 ao 1 = × s 1 + To 1 − (1+T )p o For ω 1 |p1|, a(s) ≈ ao −s/p1 ≈ ωu s A(s) ≈ ωu 1 1 =× f · ωu + s f 1 + s/(f ωu ) ωu ≡ ao × |p1| = Unity-Gain Frequency Feedback 12-20 Analog ICs; Jieh-Tsorng Wu Nyquist Diagram Im ω<0 To Re ω=0 -1 ω=∞ T (j ω) ω>0 Nyquist diagram is the polar plot of a feedback amplifier’s loop gain T (j ω) = af for −∞ < ω < ∞. Feedback 12-21 Analog ICs; Jieh-Tsorng Wu Nyquist Criterion • If the Nyquist plot encircles the point (−1, 0), the amplifier is unstable. • The number of encirclements of the point (−1, 0) gives the number of right-half-plane poles. jω s-plane σ Nyquist Diagram encircles (-1, 0) Nyquist Diagram passes through (-1, 0) ◦ • If |T (j ω)| > 1 at the frequency where ∠T (j ω) = −180 , then the amplifier is unstable. Feedback 12-22 Analog ICs; Jieh-Tsorng Wu Phase Margin dB To |a(j ω)| T=1 1/f p p p 1 The phase margin is defined as PM = 180◦ + ∠T (j ωt ) 3 log ω ωt is the frequency where |T (j ωt )| = 1 2 Deg ∠a(j ω) ωt log ω • A typical lower allowable limit for the ◦ phase margin is 45 , with a value of 60◦ being more common. 90 180 270 Feedback Phase Margin 12-23 Analog ICs; Jieh-Tsorng Wu Pseudo Dominant-Pole Model a(s) = ao (1 + s/ω1 )(1 + s/ω2 ) • ω1 = −p1 is the dominant pole frequency. • If other poles and zero are on the real axis at much higher frequencies, then 1 ≈ ω2 m i =2 1 − −pi m i =1 1 −zi • In practice, ω2 can be found from simulation. ω2 is the frequency at which ∠a(j ω2) = −135◦ Feedback 12-24 Analog ICs; Jieh-Tsorng Wu Phase Margin of the Pseudo Dominant-Pole Model At frequencies ω ω1 a(s) ≈ ao (s/ω1 )(1 + s/ω2 ) = ωu s(1 + s/ω2 ) The loop gain becomes T (s) = a(s) · f = Since ∠T (j ω) = −90◦ − tan−1 ω/ω2 ◦ ◦ ωu = ao × ω1 PM = 180 + ∠T (j ωt ) = 90 − tan f · ωu s(1 + s/ω2) −1 ωt ω2 ωt = tan(90◦ − PM) ω2 • ωt is the unity-gain frequency of T , i.e., |T (j ωt )| = 1 • ωt is independent of the feedback factor f . Feedback 12-25 Analog ICs; Jieh-Tsorng Wu Closed-Loop Response of the Pseudo Dominant-Pole Model Since a(s) = ao (1 + s/ω1 )(1 + s/ω2 ) The closed-loop gain is Ao a(s) A(s) = = s(1/ω1 +1/ω2) 1 + a(s) × f 1+ + (1+a 1+a f o Ao = ao 1 + ao f ωo = (1 + aof )(ω1 ω2) s2 = o f )(ω1 ω2 ) Q= Ao 1 + ωsQ + o s2 ω2 o (1 + aof )/(ω1ω2) 1/ω1 + 1/ω2 √ • If Q = 1/ 2 = 0.707, |A(j ω)| has the widest passband without peaking. It −3 dB frequency is ωo. • If Q > 0.5, the percentage overshoot of the step response is % overshoot = 100e−π/ Feedback 12-26 √ 4Q2 −1 Analog ICs; Jieh-Tsorng Wu Quality Factor (Q) and Phase Margin If aof 1 and ω2 ω1, then 1 Ao ≈ f ωo ≈ f ωuω2 Q≈ f aoω1 ≈ ω2 ωu f ω2 Since |T (j ωt )| = 1, we have |T (j ωt )| = f ωu j ωt (1 + j ωt /ω2) =1 ωu ωt Q2 = f = ω2 ω2 ⇒ ωu f = ωt ωt 1+ ω2 ωt 1+ ω2 2 2 • For a given phase margin, ωt /ω2 is known. Then Q can be found using the above equation. Feedback 12-27 Analog ICs; Jieh-Tsorng Wu Quality Factor (Q) and Phase Margin PM 45◦ ◦ 55 60◦ ◦ 65 ◦ 70 ◦ 75 ωt /ω2 1.000 0.700 0.577 0.466 0.364 0.268 f (ωu/ω2) 1.414 0.854 0.666 0.514 0.387 0.277 Q 1.189 0.924 0.816 0.717 0.622 0.527 Overshoot 36.8% 13.3% 8.7% 4.7% 1.4% 0.008% ◦ • Define αt ≡ ωt /ω2 and αp ≡ f (ωu/ω2). Note that αt ≈ αp for PM > 65 . ◦ • Design with PM > 65 for no peaking in frequency response. ◦ • Design with PM > 80 for no overshoot in step response. Feedback 12-28 Analog ICs; Jieh-Tsorng Wu Dominant-Pole Compensation f jω s-plane Cc > 0 f=0 Vi gm1 gm2 σ Vo p R1 C1 Cc 2 p 1 p’ 1 C2 R2 The original poles of a(s) are −1 p1 = R1C1 −1 p2 = R2C2 gm1 ωu = |Av (0)| · |p1 | = gm1R1gm2R2 · |p1| = · gm2R2 C1 By adding compensation capacitor Cc −1 p1 = R1(C1 + Cc) Feedback ωu = 12-29 gm1 (C1 + Cc) · gm2R2 Analog ICs; Jieh-Tsorng Wu Dominant-Pole Compensation • The −3 dB bandwidth of the closed loop gain is approximately f · ωu = αp · |p2| ω−3dB ≈ ωt = αt · |p2 | where αt and αp are determined by the required phase margin. • Cc usually is quite large (typically > 1000 pF) and cannot be realized on a monolithic chip. • For a general-purpose opamp where 0 < f ≤ 1, if the opamp is compensated for f = 1, it it guaranteed to be stable for all f , although it will be slower than necessary. Feedback 12-30 Analog ICs; Jieh-Tsorng Wu Miller (Pole-Splitting) Compensation f s-plane jω Cc f=0 ic Vi v1 gm1 gm2 v2 σ Vo p’ 2 R1...
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This note was uploaded on 03/26/2013 for the course EE 260 taught by Professor Choma during the Winter '09 term at USC.

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