Analog Integrated Circuits (Jieh Tsorng Wu)

If voc vcm i1 and i2 are nonlinear functions of vod

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Unformatted text preview: of R1. Opamp-II 14-21 Analog ICs; Jieh-Tsorng Wu A General-Purpose BJT Current-Feedback Opamps VCC I Output Buffer 1:1 B If 1 Vo Q1 Q3 Ro Vi Cc Vn Q4 R2 If Q2 I B R1 1:1 VEE Opamp-II 14-22 Analog ICs; Jieh-Tsorng Wu A General-Purpose BJT Current-Feedback Opamps Due to the symmetry of the input stage, we have Vi = Vn. If R1 R2 If = 1/(gm1 + gm2), we have Vo − Vn R2 − Vn 1 1 1 − Vi = Vo + R1 R2 R1 R2 Vo Ro(R1 + R2) = Av = Vi (Ro + R2)R1 If Ro R2, R2 Av ≈ 1 + R1 1 Vo = −If sCc + 1/Ro 1 1 + sCc(Ro R2) 1 1 + sCcR2 Also the loop gain is T (s) = Opamp-II 1 sCc + 1/Ro 14-23 1 R2 1 ≈ sCcR2 Analog ICs; Jieh-Tsorng Wu Fully Differential Operational Amplifiers Jieh-Tsorng Wu ES A July 16, 2002 1896 National Chiao-Tung University Department of Electronics Engineering Fully Balanced Circuit Topology Vi2 Vo1 Vi1 Vx1 Vo2 vod Ad m = voc Ad cm Acd m Acm Vx2 Vi d = Vi 1 − Vi 2 vi d vi c Vi c = (Vi 1 + Vi 2)/2 Vod = Vo1 − Vo2 Voc = (Vo1 + Vo2 )/2 • In practice, want Ad m 1 Acm 1 • If the circuit is fully symmetrical, Acd m = 0 Opamp-III 15-2 Ad cm = 0 Analog ICs; Jieh-Tsorng Wu Fully Balanced Circuit Topology • Signal is carried in Vxd = Vx1 − Vx2. Let Vx1 = A sin ωt + n1 Vx2 = −A sin ωt + n2 Vxd = 2A sin ωt + n1 − n2 Assuming n1 and n2 are uncorrelated, then 2 SNRx1 = SNRx2 = A /2 n2 2 ⇒ SNRxd = 2A n2 + n2 1 2 2 = 2A 2n2 = 2SNRx1 • Immune to common-mode noise, such as noises from power supplies and substrate. • No even-order harmonic distortion in Vxd . • Require additional common-mode feedback circuitry to set Vxc = (Vx1 + Vx2)/2. Opamp-III 15-3 Analog ICs; Jieh-Tsorng Wu Small-Signal Models for Differential Loading π -Network Model T-Network Model i1 i1 v1 DM Half Circuit v1 Zd 2 Zc 2 Zc Zd 4 2 Zd Zd 2 v2 vd (-2Z c) CM Half Circuit id 2 ic vc Zd 2 Zc Zc v2 i2 i2 vd = v1 − v2 vc = (v1 − v2)/2 Zd = Opamp-III vd id vc =0 id = (i1 − i2)/2 vc Zc = ic 15-4 ic = (i1 + i2)/2 vd =0 Analog ICs; Jieh-Tsorng Wu Small-Signal Models for Differential Signal Sources Thevenin-Network Model Norton-Network Model i1 DM Half Circuit id i1 Zoc v1 Zoc Zod 2 4 2 v1 Zod vod Zod (-2Z oc) iod voc vod id 2 voc vc Zoc vod 2 2 ic vd 2 Zod 2 ioc 2 CM Half Circuit 2 Zod ioc ic vd vc 2 2 Zoc v2 v2 i2 i2 Zod 2 iod vod = Ad mvi d Ad m Opamp-III vod = vi d iod =0 voc = Acm vi c Acm voc = vi c iod = Gmd vi d Gmd ioc =0 15-5 iod = vi d vod =0 ioc Zoc ioc = Gmcvi c Gmc ioc = vi c voc =0 Analog ICs; Jieh-Tsorng Wu Common-Mode Feedback (CMFB) Vo1 Vcfb Vnc VCM Vod 2 Voc CM T(s) Detector Vod Vcfb 2 Vo2 Vcf b = (Voc − VCM ) · T (s) Voc = Vnc − Vcf b ⇒ Voc = T 1 × VCM + × Vnc 1+T 1+T • Want large CMFB loop gain, T , to stabilize Voc. • May want large ωt of T to suppress high-frequency components in Vnc. • Must check the frequency stability of 1/[1 + T (s)]. Opamp-III 15-6 Analog ICs; Jieh-Tsorng Wu A Fully Differential Two-Stage Operational Amplifier VDD M3 M4 VB2 M6 Cc1 Vo1 M7 Vi1 VB1 M1 VB1 M3 M1 Cc2 Vi2 M2 M3 vo1 vi1 M6 Cc1 M1 vo1 M7 M7 go5 2 Cx 2 CM Half Circuit DM Half Circuit Opamp-III M9 VDD M6 Cc1 Vo2 VB1 M5 VSS VDD vi1 M8 15-7 Analog ICs; Jieh-Tsorng Wu CMFB Using Resistive Divider and Error Amplifier Common-Mode Feedback VDD M6 VDD M8 C1 IB3 Vo2 R1 MB1 R2 M7 VB1 MB2 VCM M9 MB5 VSS Opamp-III IB2 C2 Vo1 VB1 IB1 MB6 MB3 MB4 VSS 15-8 Analog ICs; Jieh-Tsorng Wu CMFB Using Resistive Divider and Error Amplifier M6 inc1 C1 voc gmb1 2 Cc1 CL R1 inc2 M7 voc MB6 MB3 MB5 • The loop gain |T | ≈ gmb5(ro6 ro7) · gmb1/(2gmb3). • C1 and C2 are used to improve high-frequency response. • The resistive loading of R1 and R2 can degrade Ad m. Voltage buffers can be added between the opamp’s outputs and the resistive divider. Opamp-III 15-9 Analog ICs; Jieh-Tsorng Wu CMFB Using Resistive Divider and Direct Current Injection Common-Mode Feedback VDD M6 VDD C1 IB2 IB1 M8 C2 Vo1 Vo2 R1 VDD R2 MB1 MB2 MB3 VCM VB1 M7 VB1 IB3 M9 VSS VSS Opamp-III 15-10 Analog ICs; Jieh-Tsorng Wu CMFB Using Dual Differential Pairs Common-Mode Feedback VDD M6 VDD M8 IB1 IB3 IB2 IB4 Vo1 MB3 MB4 MB2 MB1 Vo2 I2 VCM I1 I3 VB1 M7 VB1 MB6 M9 MB7 MB8 VSS Opamp-III MB5 VSS 15-11 Analog ICs; Jieh-Tsorng Wu CMFB Using Dual Differential Pairs For the MB1-MB2 and MB3-MB4 source-coupled pairs, IBB = IB3 = IB4 = 2 × Id d = k Vi d 2 4 IBB − Vi 2 d k k2 · Vov 2 Id 1 = W L k=k IBB Id d + 2 2 Id 2 = IBB Id d − 2 2 IBB k IBB + (Voc + Vod /2 − VCM ) 4 − (Voc + Vod /2 − VCM )2 I1 = 2 4 k IBB k 2 + (Voc − VCM + Vod /2) 4Vov ≈ 2 4 IBB k 2 + (Voc − VCM + Vod /2) 4Vov ≈ 2 4 1 (Voc − VCM )Vod 1 − × 1− 2 2 4Vov − (Vod /2)2 8 Opamp-III 15-12 − (Vod /2)2 − (Voc − VCM )Vod − (Vod /2)2 (Voc − VCM )Vod 2 4Vov − (Vod /2)2 2 + ··· Analog ICs; Jieh-Tsorng Wu CMFB Using Dual Differential Pairs IBB k 2 + (Voc − VCM − Vod /2) 4Vov − (Vod /2)2 2 4 1 (Voc − VCM )Vod 1 (Voc − VCM )Vod − × 1+ 2 2 2 2 4Vov − (Vod /2) 8 4Vov − (Vod /2)2 2 k 2 I3 = I1 + I2 ≈ IBB + (Voc − VCM ) 4Vov − (Vod /2)2 2 2 Vod 1 (Voc − VCM )Vod 1 − × 1− 2 2 2 4 4Vov − (Vod /2) 8 4Vov − (Vod /2)2 2 I2 ≈ + ··...
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This note was uploaded on 03/26/2013 for the course EE 260 taught by Professor Choma during the Winter '09 term at USC.

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