Analog Integrated Circuits (Jieh Tsorng Wu)

Io gmva sc2 vo va sclvo c1vi va cpva c2va

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: uts of A1 and A2. • To increase ∆Vo, M7, M8, and M9, can be biased in the triode region. However, Av (0) is reduced due to the reduced ro of M7 and M8. Also, CMRR and PSRR are degraded due to the reduced ro of M9. • Reference: Gulati and Lee, JSSC 12/98, pp. 2010– 2019. VSS Opamp-III 15-27 Analog ICs; Jieh-Tsorng Wu Fully Differential Gain-Enhancement Auxiliary Amplifiers A1 Aux Amplifier A2 Aux Amplifier VDD VB1 Vi VPC Ma1 Vi Vo Vb4 VB2 VB1 Vb1 Vo Mb1 VDD VDD VNC Vi Vi VB3 Vo VSS VB4 Vo VSS VB4 VSS • VS 3 ≈ VS 4 ≈ VNC , due to the CMFB of M3, M4, and A2. • VS 5 ≈ VS 6 ≈ VP C , due to the CMFB of M5, M6, and A1. Opamp-III 15-28 Analog ICs; Jieh-Tsorng Wu Replica-Tail Feedback Vo2 VDD Vo1 A2 M4 Ic M3 VNC A3 Vbt Vy VNC Vi1 M1 M2 Vi2 M9 M1r M2r Vi1 Cc M9r VSS VDD VSS VB1 VB1 A3 Aux Amplifier Vo VNC Vy Vi Vi Vbt VB3 Vo VB4 A2 Aux Amplifier VSS Opamp-III VSS 15-29 Analog ICs; Jieh-Tsorng Wu Replica-Tail Feedback • The feedback loop increase M9’s output resistance, Ro9 , i.e., Ro9 = ro9 1 + A3 · (gm9r ro9r )(gm1r ro1r ) = ro9 1 + Al oop • It can be shown the effective common-mode transconductance of M1-M2-M9 is Ge = Gm × 1 + Al oop · M 1 + Al oop gm Gm = 1 + gmro9 gmr Gmr = 1 + gmr ro9r M =1− gm9 Gmr · gm9r Gm gm = gm1 + gm2 gmr = gm1r = gm2r • The mismatch M and the bandwidth of the feedback loop limit the enhancement effect. Opamp-III 15-30 Analog ICs; Jieh-Tsorng Wu Operational Amplifiers and Their Basic Configurations Jieh-Tsorng Wu ES A July 16, 2002 1896 National Chiao-Tung University Department of Electronics Engineering Ideal Operational Amplifier Single-Ended Output Vi Fully Differential Vi Vo Vo A/2 x Vi AxV i Vcm A/2 x Vi Vi Vi Vo • Vo = A × Vi • Ideal opamp: – A → ∞, Zi n → ∞, Zout → 0. – No frequency dependence. Opamps-BC 16-2 Analog ICs; Jieh-Tsorng Wu Operational Amplifier Imperfections (I) VDD VOS IB1 Zi c Zo Vi + IB IOS 2 Ve Zi d AVe Vi − IB2 IB Vo Zi c VSS Differential Input = Vi d ≡ Vi + − Vi − Opamps-BC Common-mode Input = Vi c ≡ 16-3 Vi + + Vi − 2 Analog ICs; Jieh-Tsorng Wu Operational Amplifier Imperfections (II) • Finite differential-mode gain, Ad m ≡ d Vo d Vi d V =0 ic • Non-zero common-mode gain, Acm ≡ d Vo d Vi c V =0 id Common-Mode Rejection Ratio (CMRR) ≡ Ad m Acm • Frequency response: Ad m(s) and Acm(s). • Input impedance: Zi d and Zi c. • Output impedance: Zo. • Power supply bias current: IDD . Opamps-BC 16-4 Analog ICs; Jieh-Tsorng Wu Operational Amplifier Imperfections (III) • Input offset voltage: VOS ≡ (Vi + − Vi −)|Vo=0 • Input bias current: IB ≡ (IB1 + IB2 )/2 • Input offset current: IOS ≡ IB1 − IB2 • Input common-mode range: Vi c(max) and Vi c(mi n). Range of Vi c for which amplifier is operational. • Output voltage range: Vo(max) and Vo(mi n). + − • Maximum output currents: Io(max) and Io(max). • Internal slew rate: SR+ and SR−. Internally-limited rate of change in Vo in response to a step input. Opamps-BC 16-5 Analog ICs; Jieh-Tsorng Wu Operational Amplifier Imperfections (IV) • Power supply signal gain: ADD (s) and ASS (s). Power supply rejection ratio (PSRR) are: Ad m Ad m PSRRSS ≡ PSRRDD ≡ ADD ASS • Supply capacitance. Capacitive coupling between power supplies and the opamp’s input leads. • Inherent noises in active devices and resistors. Opamps-BC 16-6 Analog ICs; Jieh-Tsorng Wu Inverting Configuration Z Let Zi n = ∞ for the opamp, then I Z1 Vi I1 V I − Vo − Vi − V − I = I1 − I = Z1 − − V − Vo =0 − Z Vo = −A × V − −AV − Closed-Loop Gain = ACL = Vo Vi =− Input Impedance = Zi c = Z Z1 1 + 1 1 A Z 1+Z Z 1 =− Z1 1 + rr 1 Vi Z1 Z1 = ≈ I1 1 + ACL 1 + 1 · − Z A A Z 1 Opamps-BC 16-7 Analog ICs; Jieh-Tsorng Wu Inverting Configuration The error term, r r (s), is due to the finite opamp gain. rr • r r (s) = Z 1 1+ A Z1 can be expressed in terms of magnitude and phase, i.e., (j ω) = mrr (ω)ej ϕrr (ω) ≈ mrr (ω) + j ϕrr (ω) rr • If rr 1, ACL ≈ − Opamps-BC Z · (1 − Z1 16-8 rr ) Analog ICs; Jieh-Tsorng Wu Examples of Inverting Configuration Inverting Amplifier Inverting Integrator C R R1 R1 Vi Vi Vo Vo For the inverting amplifier ACL = − R 1 R1 1 + rr = R 1 1+ A R1 rr = 1 1 1+ A sR1 C rr For the inverting integrator ACL = − Opamps-BC 1 1 sR1 C 1 + rr 16-9 Analog ICs; Jieh-Tsorng Wu Inverting Summer Configuration Z Z1 V1 Vo Z2 V2 ZN VN N Vo = − i =1 Opamps-BC Z Vi · Zi 1+ 1 1 A 1+ NZ i = 1 Zi 16-10 =− N i =1 Z 1 V· 1+ Zi i rr Analog ICs; Jieh-Tsorng Wu Noninverting Configuration ZB Let Zi n = ∞ for the opamp, then IB ZA V I IA Vo − V − I = IB − IA = ZB − Vo − Vi − V − =0 ZA Vo = −A × (Vi − V −) − A(Vi − V ) Closed-Loop Gain = ACL − ZB 1 1 = = 1+ = ACL,∞ (s) ZB 1+ Vi ZA 1 1+ A 1+ Z Vo rr A Input Impedance = Zi c = Zi (1 + T ) Output Impedance = Zoc = Zo 1+T ZA T = Loop Gain = A × ZA + ZB Opamps-BC 16-11 Analog ICs; Jieh-Tsorng Wu Switched-Capacitor Applications C2 Vi C1 1 2 C2 1 Vo 2 Io C1 V a Vi CL Vo Cp CL φ1 Model During φ1 φ2 For the opamp in closed-loop gain calculation, let Vo = −A × Va. C1(Vi − Va ) = CpVa + C2(Va − Vo) ACL Vo Opamps-BC C1 Vi + C1 = =− Vi C2 1 + ⇒ 1 1 A C1 + C2 + Cp C2 C1 1 =− C2 1 + 16-12 Vo A = −Cp rr rr Vo A − C2Vo 1 = A 1+ 1 +1 A C1 + Cp C2 Analog ICs; Jieh-Tsorng Wu Switched-Capacitor Step Response For the opamp in st...
View Full Document

This note was uploaded on 03/26/2013 for the course EE 260 taught by Professor Choma during the Winter '09 term at USC.

Ask a homework question - tutors are online