Analog Integrated Circuits (Jieh Tsorng Wu)

Reference output issues gatti current mirror bjt

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Unformatted text preview: ap Reference Band-Gap Reference Output Issues Gatti Current Mirror BJT Wilson Current Mirror 10. Output Stages Output Stage Requirements MOST Wilson Current Mirror Complementary Current Source Load Output Stage Design Issues Nonlinearity and Harmonic Distortion Current Mirror Load Class-A BJT Emitter Follower Diode-Connected Load Class-A BJT Emitter Follower Output Power 9. Voltage and Current References Sensitivity and Temperature Coefficient Instantaneous Power Dissipation Class-A MOST Source Follower Distortion in the MOST Source Follower Simple Current Sources BJT Widlar Current Source Class-A BJT Common-Emitter Stage MOST Widlar Current Source Distortion in Class-A BJT Common-Emitter Stage BJT Peaking Current Source Class-A MOST Common-Source Stage MOST Peaking Current Source Class-B Push-Pull Emitter Follower BJT VBE Referenced Current Source Output Power of Class-B Push-Pull Emitter Follower MOST Vt Referenced Current Source Class-AB Push-Pull Emitter Followers Self-Biasing BJT VBE Reference Class-AB Push-Pull Source Followers Self-Biasing BJT VBE Reference with StartUp Circuit Class-AB Push-Pull Common-Source Stage Self-Biasing BJT UT Reference Self-Biasing MOST Vt Referenced Current Source Self-Biasing MOST gm Referenced Current Source Class-AB Quasi-Complementary Configuration An Error Amplifier Example Combined Common-Drain Common-Source Configuration Parallel Common-Source Configuration 11. Noise Analysis and Modelling Noise in Time Domain Probability Density Function Noise in Frequency Domain Filtered Noise Noise Summation Piecewise Integration of Noise Thermal Noise Noise Factor of an FET Common-Source Stage Noise Performance of Other Configurations Emitter-Coupled Pair Noise Performance Effect of Ideal Feedback on Noise Performance Effect of Input Series Feedback Feedback on Noise Performance Effect of Input Shunt Feedback Feedback on Noise Performance Thermal Noise with Loading Effect of Feedback on Noise Performance Shot Noise Effect of Cµ on Noise Performance Flicker Noise (1/f Noise) Single-Stage Amplifier with Local Feedback BJT Noise Model Operational Amplifier Noise Model FET Noise Model A Low-Pass Filter Example Equivalent Input Noise Generators A Current Amplifier Example Noise Factor and Input Noise Generators Noise Generators of a BJT Common-Emitter 12. Feedback and Compensation Stage Feedback Noise Voltage Generator of a BJT CommonEmitter Stage Noise Current Generator of a BJT CommonEmitter Stage BJT Equivalent Input Shot Noise Spectral Density Total Equivalent Noise Voltage of a BJT Common-Emitter Stage Noise Generators of a FET Common-Source Stage Noise Voltage Generator of a FET CommonSource Stage MOST Equivalent Input Noise Voltage Spectral Density Noise Current Generator of a FET CommonSource Stage Noise Factor of a BJT Common-Emitter Stage Effect of Negative Feedback on Distortion Series-Shunt Feedback Configuration Shunt-Shunt Feedback Configuration Shunt-Series Feedback Configuration Series-Series Feedback Configuration Two-Port Analysis of Feedback Amplifier Loading Approximation Method Two-Port Analysis of a Shunt-Shunt Feedback Amplifier Return Ratio Closed-Loop Gain Using Return Ratio Blackman’s Impedance Formula A Transresistance Feedback Amplifier Frequency Response of Feedback Amplifiers Single-Pole Model Input Stage Common-Mode Transconductance Nyquist Diagram Input Stage Voltage Gain Nyquist Criterion Simplified Two-Stage Model Phase Margin Frequency Compensation Using Nulling Resistor Pseudo Dominant-Pole Model Phase Margin of the Pseudo Dominant-Pole Model Closed-Loop Response Dominant-Pole Model of the Frequency Compensation Using Zero-Nulling Resistor Pseudo Voltage and Current Range Quality Factor (Q) and Phase Margin Slew Rate Dominant-Pole Compensation Settling Time Dominant-Pole Compensation Input Impedance Miller (Pole-Splitting) Compensation Output Impedance Feedforward Zero in Miller Compensation Systematic Input Offset Voltage Miller Compensation With Unity-Gain Buffer Random Input Offset Voltage Miller Compensation With Common-Gate Stage Input Offset Voltage and Common-Mode Rejection Ratio Miller Compensation With Nulling Resistor Miller Compensation Transconductor with Feedforward Nested-Miller Compensation Zeros in the Nested-Miller Compensation Nested-Miller Compensation with Feedforward Transconductors 13.Basic Two-Stage Operational Amplifier Design Ideal Operational Amplifier Basic 2-Stage CMOS Opamp Constant gm Bias Generator Input Stage Small-Signal Model Input Stage Output Impedance Input Stage Differential-Mode Transconductance CMRR Due to Systematic and Random Offset Mismatches and Input Stage Transconductance Power Supply Rejection Ratio (PSRR) Power Supply Rejection Ratio (PSRRSS) Power Supply Rejection Ratio (PSRRDD) PSRRDD with Common-Gate Miller Compensation Supply Capacitance Power-Supply Rejection and Supply Capacitance Device Noise Analysis Thermal Noise Performance Flicker Noise Performance 2-Stage Opamp with...
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This note was uploaded on 03/26/2013 for the course EE 260 taught by Professor Choma during the Winter '09 term at USC.

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