Analog Integrated Circuits (Jieh Tsorng Wu)

The frequency acquisition aid provided by the pfd is

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Unformatted text preview: frequency signal components in the phase difference. PLLs 27-2 Analog ICs; Jieh-Tsorng Wu Phase-Locked Loops (PLLs) Applications: • Automatic frequency control. • Frequency and phase demodulation. • Data and clock recovery. • Frequency synthesis. References: • Roland E. Best, “Phase-Locked Loops,”, 2nd Edition, McGraw-Hill, Inc., 1993. • Dan H. Wolaver, “Phase-Locked Loop Circuit Design,” Prentice-Hall, Inc., 1991. • Floyd M. Gardner, “Phaselock Techniques,” 2nd Edition, John Wiley & Sons, 1979. PLLs 27-3 Analog ICs; Jieh-Tsorng Wu Basic Model Vd = Kd (θi − θo) θi ωo = ωoo + Ko × Vc Vd PD F(s) Phase Detector Vc Filter Ko/s θo VFO When the PLL is locked, Vd (s) = Kd · [θi (s) − θo(s)] = Kd θe(s) θe = θi − θo Vc(s) = F (s) · Vd (s) ωod t = ωoot + KoVcd t = ωoot + θo ⇒ Ko θo(s) = Vc(s) · s • θe is the phase error, Kd is the phase-detector gain factor, and Ko is the VCO gain factor. PLLs 27-4 Analog ICs; Jieh-Tsorng Wu Basic Model System equations are Vd = Kd · (θi − θo) = Kd · θe Vc = F (s) · Vd θo = Vc · Ko s The transfer functions are θo θi = KoKd F (s) s + KoKd F (s) = H (s) θe s = = 1 − H (s) θi s + KoKd F (s) sKd F (s) Vc s = · H (s) = θi s + KoKd F (s) Ko ⇒ ∆ωo Vc H (s) = = Ko · ∆ωi ∆ωi ∆ωi = ωi − ωoo ∆ωo = ωo − ωoo • H (s) is the closed-loop transfer function. PLLs 27-5 Analog ICs; Jieh-Tsorng Wu Second-Order PLL — Active Lag-Lead Filter R2 C R1 Vo Vi sτ2 + 1 F (s ) = − sτ1 τ1 = R1 C τ2 = R2 C 2 H (s) = 2ζ ωns + ωn s2 + 2ζ ωns + ω2 n ωn = KoKd τ1 ωn · τ2 ζ= 2 • ωn is the pole frequency of the loop. • ζ is the damping factor. Qp = 1/(2ζ ) is the pole quality factor. PLLs 27-6 Analog ICs; Jieh-Tsorng Wu Second-Order PLL — Passive Lag-Lead Filter R1 Vo Vi F (s) = R2 τ1 = (R1 + R2)C C 2 H (s) = τ2 = R2C 2 s 2ζ ωn − ωn/(KoKd ) + ωn s2 + 2ζ ωns + sτ2 + 1 sτ1 + 1 ωn = ω2 n KoKd τ1 ωn 1 τ2 + ζ= 2 KoKd • If R2 = 0, then 1 1 τ1 = = R1C ωLF PLLs ωn = KoKd ωLF 27-7 ωn ζ= 2KoKd H (s) = ω2 n s2 + 2ζ ωns + ω2 n Analog ICs; Jieh-Tsorng Wu High-Gain Second-Order PLL Frequency Response If KoKd τ2 1 in the passive filter, then 2 Hpassive(s) ≈ Hactive(s) = 2ζ ωns + ωn s2 + 2ζ ωns + ω2 n And the −3 dB bandwidth of H (s) is 1/2 ω−3dB = ωn 2ζ 2 + 1 + (2ζ 2 + 1)2 + 1 • Usually choose ωn < ωi /10 to remove the high-frequency components at ωi , 2ωi , . . . , existing in the phase detector’s output. • The PD output’s high-frequency components can show up as spurious tones in the frequency spectrum of the PLL’s output. PLLs 27-8 Analog ICs; Jieh-Tsorng Wu High-Gain Second-Order PLL Frequency Response 10 ζ = 5.0 5 | H ( j ω) | (dB) ζ = 2. 0 0 -5 -10 ζ = 0.3 ζ = 0.5 -15 ζ = 0.707 -20 0.1 1 10 Frequency (ω/ωn ) PLLs 27-9 Analog ICs; Jieh-Tsorng Wu Step Response of a Two-Pole System Consider the following two-pole transfer function 2 H (s) = ωn Poles = s1,2 = −ζ ± s2 + 2ζ ωns + ω2 n ζ 2 − 1 ωn • If ζ > 1, the system is overdamped, and both poles are real. Step Response = 1 − k1 = ζ − 1 −k1ωnt 1 −k2ωnt e −e k2 2 ζ 2 − 1 k1 1 ζ2 − 1 k2 = ζ + ζ2 − 1 • If ζ = 1, the system is critically damped, and both poles are at −ωn . Step Response = 1 − (1 + ωnt )e−ωnt ≈ 1 − e−ωnt/(2ζ ) PLLs 27-10 if 4ζ 2 1 Analog ICs; Jieh-Tsorng Wu Step Response of a Two-Pole System • If ζ < 1, the system is underdamped. Step Response ζ ωn Step Response = 1 − · sin ωd t + cos ωd t e−ζ ωnt ωd √ 2 % Overshoot = 100e−π/ 1/ζ −1 ωd = 1 − ζ 2 · ωn Overshoot 1 Error Band t √ • For PLL, choose ζ > 1/ 2 = 0.707 to avoid excessive ringing. PLLs 27-11 Analog ICs; Jieh-Tsorng Wu Phase Jitter Probability Density V nt N θn Vs θn nc pdf = 2 2 −θ /(2σ ) 1 √ en n 2πσn v (t ) = s(t ) + n(t ) = Vs sin(2πfot ) + n(t ) n(t ) = nc(t ) sin(2πfot ) + nt (t ) cos(2πfot ) The phase jitter is nt (t ) ≈ θn(t ) = tan Vs Vs + nc(t ) nt (t ) PLLs 27-12 Analog ICs; Jieh-Tsorng Wu Phase Jitter Assume that n2 = 1212 ·n...
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