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Unformatted text preview: .16a. A typical op a mp h as a very large gain. T he o utput voltage
V 2 =  AVl, where A is t ypically 10 5 t o 106 . T he i nput i mpedance is very high
(typically 1 06 0 for B JT t o 10 12 0 for BiFET), a nd t he o utput i mpedance is very
low (50 t o 1 000). For most applications, we a re justified in assuming t he gain A
a nd t he i nput i mpedance t o b e infinite a nd t he o utput i mpedance to be zero. For
this reason we see a n ideal voltage source a t t he o utput.
Consider now t he o perational amplifier with resistors Ra a nd Rb connected, as
shown in Fig. 6.16c. This configuration is known as t he n on i nverting a mplifier.
Observe t hat t he i nput polarities in this configuration are inverted when compared
t o t hose in Fig. 6.16a. We now show t hat t he o utput voltage V 2 a nd t he i nput
voltage V I in this case are related by K=1+~ (6.62) First, we recognize t hat because t he i nput impedance a nd t he gain of t he o perational
amplifier approach infinity, the i nput c urrent i x a nd t he i nput voltage V x in Fig.
6.16c must approach zero. T he d ependent source in this case is A v x i nstead of
 Av x because of t he i nput p olarity inversion. T he d ependent source A v x (see Fig.
6.16b) a t t he o utput will generate current i o , as illustrated in Fig. 6.16c. Now 408 6 C ontinuousTime S ystem A nalysis U sing t he L aplace T ransform 409 6 .4 A nalysis o f E lectrical N etworks: T he T ransformed N etwork a lso + T herefore V; ~ = Rb + R a = 1 + Rb = K
Ra Vl ( t) Ra or
(a) T he e quivalent c ircuit o f t he n oninverting a mplifier is d epicted i n F ig. 6 .16d.
• E xample 6 .16
T he c ircuit i n Fig. 6.17a is called t he S allenKey circuit, which is frequently u sed
in filter design. F ind t he t ransfer function H (s) r elating t he o utput v oltage Va(t) t o t he I i nput v oltage V i ( t) .
We are r equired t o find Rj I R , ( s) H (s) = Vo(s)
Vi(S) V,,(S);;l \I;(s) + Va(s);;2 Vb(S) + [VatS)  ..!...
( ~ + R2 + C1S) Va(S)  R2 or C Rz = Rl Vi(S) + +
_1 Va ( s) CZs Vb ( S) KVb ( s) (b) F ig. 6 .17 SallenKey circuit a nd i ts equivalent. a nd
(6.63a) A pplication of C ramer's rule t o E q. (6.64) yields 1 Vb(S)
\I;(s) Similarly, t he n ode e quation a t node b yields Vb(S)  Vats)
R2 I R, ( s) KVb(S)] C1S = 0 (..!... + K C1S) Vb(S) R1 a + a ssuming all i nitial c onditions t o b e zero.
Figure 6.17b shows t he t ransformed version of t he c ircuit in Fig. 6.17a. T he noninverting amplifier i s replaced b y i ts equivalent circuit. All t he voltages are replaced b y t heir
Laplace t ransforms a nd all t he circuit elements are shown by their impedances. All t he
i nitial conditions a re assumed to b e zero, as required for determining H (s).
We shall use n ode analysis t o derive t he r esult. T here a re two unknown node voltages,
Va(s) a nd Vb(S), r equiring two node equations.
At node a, I R,(s), t he c urrent in R l (leaving t he n ode a), is [Va(s)  \I;(S)]/Rl' Similarly, IR2(s), t he c urrent in R2 (leaving t he n ode a), is [Va(s)  Vb(s)]/R2 a nd Ie, (s), t he
c urrent in...
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This note was uploaded on 04/14/2013 for the course ENG 350 taught by Professor Bayliss during the Spring '13 term at Northwestern.
 Spring '13
 Bayliss
 Signal Processing, The Land

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