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Unformatted text preview: S,D -- -- -- 3.6 4.2 4.6 2.1 2.1 3.8 3.8 0.45 0.25 1.2 -- -- 5.5 5.5 -- -- 2.8 3.3 5.6 7 1.0 0.45 1.6 1 1 mA mA mA mA mA mA mA A A V V V (Note 3) -40C < TA < 125C, (Note 3) BOOST<1:0> = 00 -40C < TA < 125C, BOOST<1:0> = 00 BOOST<1:0> = 11 -40C < TA < 125C, BOOST<1:0> = 11 DVDD = 5V, MCLK = 4 MHz DVDD = 2.7V, MCLK = 4 MHz DVDD = 5V, MCLK = 8.192 MHz AVDD pin only (Note 5) DVDD pin only (Note 5) MCLK 1 -- 16.384 MHz (Note 8) Symbol AC PSRR DC PSRR CMRR Min -- -- -- Typical -77 -77 -72 Max -- -- -- Units dB dB dB Conditions AVDD and DVDD = 5V + 1 VPP @ 50/60 Hz AVDD and DVDD = 4.5 to 5.5V VCM varies from -1V to +1V 2: 3: 4: 5: 6: 7: 8: This specification implies that the ADC output is valid over this entire differential range and that there is no distortion or instability across this input range. Dynamic performance is specified at -0.5 dB below the maximum signal range, VIN = -0.5 dBFS @ 50/60 Hz = 353 mVRMS, VREF = 2.4V. See terminology section for definition. This parameter is established by characterization and not 100% tested. For these operating currents, the following bit settings apply: SHUTDOWN<1:0> = 00, RESET<1:0> = 00, VREFEXT = 0, CLKEXT = 0. For these operating currents, the following Configuration bit settings apply: SHUTDOWN<1:0> = 11, VREFEXT = 1, CLKEXT = 1. Applies to all gains. Offset error is dependant on PGA gain setting (see Figure 2-19 for typical values). Outside of this range, the ADC accuracy is not specified. An extended input range of 6V can be applied continuously to the part with no risk for damage. For proper operation and to keep ADC accuracy, AMCLK should always be in the range of 1 to 5 MHz with BOOST bits off. With BOOST bits on, AMCLK should be in the range of 1 to 8.192 MHz, AMCLK = MCLK/PRESCALE. When using a crystal, the CLKEXT bit should be equal to `0'. 2011 Microchip Technology Inc. DS22192D-page 5 MCP3901 SERIAL INTERFACE SPECIFICATIONS Electrical Specifications: Unless otherwise indicated, all parameters apply: AVDD = 4.5 to 5.5V, DVDD = 2.7 to 5.5V, -40C < TA < +85C, CLOAD = 30 pF Parameters Serial Clock Frequency CS Setup Time CS Hold Time CS Disable Time Data Setup Time Data Hold Time Serial Clock High Time Serial Clock Low Time Serial Clock Delay Time Serial Clock Enable Time Output Valid from SCK Low Modulator Output Valid from AMCLK High Output Hold Time Output Disable Time Reset Pulse Width (RESET) Data Transfer Time to DR (data ready) Data Ready Pulse Low Time Schmitt Trigger High-Level Input Voltage Schmitt Trigger Low-Level Input Voltage Hysteresis of Schmitt Trigger Inputs (all digital inputs) Low-Level Output Voltage, SDO Pin Low-level output voltage, DR and MDAT Pins High-level output voltage, SDO pin High-level output voltage, DR and MDAT pins Input leakage current Output leakage current Internal capacitance (all inputs and outputs) Note 1: Sym fSCK tCSS tCSH tCSD tSU tHD tHI tLO tCLD tCLE tDO tDOMDAT tHO tDIS tMCLR tDODR tDRP VIH1 VIL1 VHYS VOL VOL VOH VOH ILI ILO CINT Min -- -- 25 50 50 100 50 5 10 10 20 20 50 20 50 50 50 -- -- 0 -- -- 100 -- -- .7 DVDD -0.3 300 -- -- DVDD 0.5 DVDD 0.5 -- -- -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 1/DMCLK -- -- -- -- -- -- -- -- -- -- Max 20 10 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50 1/2 * AMCLK -- 25 50 -- 50 -- DVDD + 1 0.2 DVDD -- 0.4 0.4 -- -- 1 1 7 Units MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns s ns ns ns ns ns s V V mV V V V V A A pF SDO pin only, IOL = +2.0 mA, VDD = 5.0V DR and MDAT pins only, IOL = +800 mA, VDD = 5.0V SDO pin only, IOH = -2.0 mA, VDD = 5.0V DR and MDAT pins only, IOH = -800 A, VDD = 5.0V CS = DVDD, VIN = DGND or DVDD CS = DVDD, VOUT = DGND or DVDD TA = 25C, SCK = 1.0 MHz, DVDD = 5.0V (Note 1) (Note 1) 4.5 DVDD 5.5 2.7 DVDD < 5.5 (Note 1) 2.7 DVDD < 5.5 2.7 DVDD < 5.5 2.7 DVDD < 5.5 2.7 DVDD < 5.5 4.5 DVDD 5.5 2.7 DVDD < 5.5 4.5 DVDD 5.5 2.7 DVDD < 5.5 4.5 DVDD 5.5 2.7 DVDD < 5.5 4.5 DVDD 5.5 2.7 DVDD < 5.5 Conditions 4.5 DVDD 5.5 2.7 DVDD < 5.5 4.5 DVDD 5.5 2.7 DVDD 5.5 4.5 DVDD 5.5 2.7 DVDD < 5.5 This parameter is periodically sampled and not 100% tested. DS22192D-page 6 2011 Microchip Technology Inc. MCP3901 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = 4.5 to 5.5V, DVDD = 2.7 to 5.5V Parameters Temperature Ranges Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 20L SSOP Thermal Resistance, 20L QFN Note 1: JA JA -- -- 89.3 43 -- -- C/W C/W TA TA -40 -65 -- -- +125 +150 C C (Note 1) Sym Min Typ Max Units Conditions The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150C. CS fSCK tHI SCK tDO SDO MSB Out tHO tDIS LSB Out tLO tCSH Mode 1,1 Mode 0,0 SDI Don't Care FIGURE 1-1: Serial Output Timing Diagram. tCSD CS tCSS fSCK tHI tLO tCSH tCLE tCLD Mode 1,1 SCK Mode 0,0 tSU tHD SDI MSB In HI-Z...
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