Unformatted text preview: e
2 inverters, 3 AND gates, and 1 OR gate.
b. Using your network N from part (a) as a building block (and as few
additional gates as possible), draw a circuit that takes as input A =
a3a2a1a0 and B = b3b2b1b0 and outputs F = f3f2f1f0, where
F(A,B,c1c0) = A'
A' + B
A+B if c1c0 = 00
if c1c0 = 01
if c1c0 = 10
if c1c0 = 11 Warning: Use correct capitalization: a and A are not the same.
9. Design a logic circuit to detect when there is an odd number of 1 s in the 3 bit input
(ABC) (when we detect an odd input, generate a 1 to the output function F, otherwise,
generate a 0 ):
(a) Use only AND, OR, and NOT gates in your desig...
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This note was uploaded on 04/19/2013 for the course ECE 110 taught by Professor Lgranger during the Spring '13 term at Amity University.
- Spring '13