74lsxx low power schottky uses schottky transistors to

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Unformatted text preview: amilies: 74ASxx : Advanced Schottky. 74ALSxx : Advanced Low power Schottky. Twice as fast as 74Sxx with approximately the same power dissipation. Lower power consumption and higher speed than 74LSxx . 74Fxx : Fast. Performance is between 74ASxx and 74ALSxx. Logic Families Note that parameters like VOHMin , VIHMin , VILMax , and VOLMax are all the same for the different sub-families, but parameters like IILMax , IIHMax , IOLMax , and IOHMax may differ. Most TTL sub-families have a corresponding 54-series (military) version, and these series operate in a wider temperature and voltage ranges. Logic Families Complementary metal oxide semiconductor (CMOS) replaced TTL devices in the 90’s due to advances in the design of MOS circuits made in mid 80’s. Advantages: Operate with a wider range of voltages that any other logic family. Has high noise immunity. Dissipates very low power at low frequencies. It requires an extremely low driving current. High fanout. Logic Families Disadvantages: Power consumption increases with frequency. Susceptible to ESD - electro-static discharges. Sub-families: 40xx : Original CMOS family. Fairly slow, but it has a low power dissipation. 74HCxx : High speed CMOS. Better current sinking and sourcing than 40xx. It uses voltage supply between 2 and 6 volts. Higher voltage →higher speed. Lower voltage →lower power consumption. Logic Families Sub-families: 74HCTxx : High speed CMOS, TTL compatible. 74ACxx : Advanced CMOS. Better current sinking and sourcing than 40xx. It uses voltage supply of 5V. Compatible with TTL family. Very fast. It can source and sink high currents. Not TTL compatible. 74ACTxx : Advanced CMOS, TTL compatible. Same as 74ACxx, but it is compatible with TTL family. Logic Families Sub-families: 74FCTxx : Fast CMOS, TTL compatible. It is faster and has lower power dissipation than the 74ACxx and 74ACTxx sub-families. Compatible with TTL family. Prefixes, usually added to device designation to identify the manufacturer. SN : Texas Instrument. MN : Motorola. DM : National N : Signetics P : Intel Logic Families Prefixes, usually added to device designation to identify the manufacturer. MN : Motorola. DM : National N : Signetics P : Intel H : Harris SN : Texas Instrument. AMD : Advanced Micro Devices Suffixes, identifies the packaging. Sequential Logic Design Procedure Derive a state/output table from the problem specification. Minimize the number of states in the state/output table by eliminating equivalent states. Choose a set of state variables. Assign to each state a unique combination from the set derived above. Create a transition/output table. Sequential Logic Design Procedure Choose a flip-flop type and construct its excitation table. Using the excitation table fill the values for the input excitation function columns on the transition/output table. Derive the excitation and output equations. Draw logic diagram. Sequential Logic Design Procedure See excitation table below. Present State Next State 0 0 1...
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This note was uploaded on 04/28/2013 for the course EE 2731 taught by Professor Audiferred during the Spring '11 term at LSU.

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