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A should exhibit the same input capacitance as the complex gate above. Show all
b) Find the delay from A to Y (A→Y) for your compound gate using logical effort. Show
c) Find the delay from A to Y (A→Y) for the complex AOI gate above using logical effort.
Which implementation is faster (compound gate or complex AOI gate)? Show your work.
d) Estimate the dynamic power dissipation of the compound gate when B=1, C=0, D=1 and
A=CLK signal with frequency of 1MHz. Assume V...
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This note was uploaded on 06/01/2013 for the course AVLSI 6323 taught by Professor Bashir during the Spring '10 term at University of Florida.
- Spring '10