IntelSoftwareDevelopersManual

15 14 on interrupts

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: 16, 15-18, 18-3, 18-21, 18-40 RDTSC instruction . . . . . . 2-22, 4-25, 15-15, 18-4 Read/write protection, page level . . . . . . . . . . . . . . . . 4-32 rights, checking . . . . . . . . . . . . . . . . . . . . . 4-27 Real-address mode 8086 emulation . . . . . . . . . . . . . . . . . . . . . 16-1 address translation in . . . . . . . . . . . . . . . . 16-3 description of. . . . . . . . . . . . . . . . . . . . . . . 16-1 exceptions and interrupts . . . . . . . . . . . . . 16-8 IDT initialization. . . . . . . . . . . . . . . . . . . . . 8-10 IDT, changing base and limit of. . . . . . . . . 16-6 IDT, structure of . . . . . . . . . . . . . . . . . . . . 16-7 IDT, use of. . . . . . . . . . . . . . . . . . . . . . . . . 16-6 initialization . . . . . . . . . . . . . . . . . . . . . . . . 8-10 instructions supported . . . . . . . . . . . . . . . . 16-4 interrupt and exception handling . . . . . . . . 16-6 mode switching . . . . . . . . . . . . . . . . . . . . . 8-13 native 16-bit mode. . . . . . . . . . . . . . . . . . . 17-1 overview of . . . . . . . . . . . . . . . . . . . . . . . . 16-1 registers supported . . . . . . . . . . . . . . . . . . 16-4 switching to . . . . . . . . . . . . . . . . . . . . . . . . 8-15 Related literature . . . . . . . . . . . . . . . . . . . . . . . 1-9 Requested privilege level (see RPL) Reserved bits . . . . . . . . . . . . . . . . . . . . . .1-6, 18-1 RESET# pin . . . . . . . . . . . . . . . . . . . . . .5-2, 18-19 RESET# signal . . . . . . . . . . . . . . . . . . . . . . . . 2-22 Reset, hardware receiving when processor is shutdown . . . 5-33 Restarting program or task, following an exception or interrupt . . . . . . . . . . . . . . . . . . . . 5-7 Restricting addressable domain . . . . . . . . . . . 4-31 RET instruction . . . . . . . . . . 4-12, 4-13, 4-23, 17-7 Returning from a called procedure . . . . . . . . . . . . . . 4-23 from an interrupt or exception handler . . . 5-15 RF (resume) flag, EFLAGS register . 2-9, 5-9, 15-2 Rounding control, RC field of FPU control word . . . . 11-3 modes, FPU . . . . . . . . . . . . . . . . . . .11-3, 11-4 INDEX-14 INDEX results, FPU . . . . . . . . . . . . . . . . . . . . . . . .11-5 RPL description of . . . . . . . . . . . . . . . . . . . . 3-8, 4-9 field, segment selector . . . . . . . . . . . . . . . . .4-2 RSM instruction . . . . 2-22, 7-12, 12-1, 12-2, 12-3, 12-11, 12-16, 18-5 R/S# pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-2 R/W (read/write) flag page-directory entry . . . . . . . . . . 4-2, 4-3, 4-32 page-table entry . . . . . . . . 3-26, 4-2, 4-3, 4-32 R/W0-R/W3 (read/write) fields, DR7 register . 15-6, 18-24 S S (descriptor type) flag, segment descriptor . 3-11, 3-13, 4-2, 4-6 SBB instruction. . . . . . . . . . . . . . . . . . . . . . . . . .7-4 Segment descriptors access rights. . . . . . . . . . . . . . . . . . . . . . . .4-26 access rights, invalid values . . . . . . . . . . .18-24 automatic bus locking while updating . . . . . .7-3 base address fields. . . . . . . . . . . . . . . . . . .3-11 code type . . . . . . . . . . . . . . . . . . . . . . . . . . .4-3 data type . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-3 description of . . . . . . . . . . . . . . . . . . . . 2-3, 3-9 DPL (descriptor privilege level) field . . 3-12, 4-2 D/B (default operation size/default stack pointer size and/or upper bound) flag . . . . 3-12, 4-5 E (expansion direction) flag . . . . . . . . . 4-2, 4-5 G (granularity) flag . . . . . . . . . . . 3-12, 4-2, 4-5 limit field . . . . . . . . . . . . . . . . . . . . . . . . 4-2, 4-5 loading . . . . . . . . . . . . . . . . . . . . . . . . . . .18-24 P (segment-present) flag . . . . . . . . . . . . . .3-12 S (descriptor type) flag . . . 3-11, 3-13, 4-2, 4-6 segment limit field . . . . . . . . . . . . . . . . . . . .3-10 system type. . . . . . . . . . . . . . . . . . . . . . . . . .4-3 tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-16 TSS descriptor . . . . . . . . . . . . . . . . . . . . . . .6-6 type field . . . . . . . . . . . . . . 3-11, 3-13, 4-2, 4-6 type field, encoding. . . . . . . . . . . . . . 3-14, 3-15 when P (segment-present) flag is clear . . .3-13 Segment limit checking . . . . . . . . . . . . . . . . . . . . . . . . . . .2-20 field, segment descriptor. . . . . . . . . . . . . . .3-10 Segment not present exception (#NP) . . . . . . .3-12 Segment registers description of . . . . . . . . . . . . . . . . . . . . . . . .3-8 saved in TSS . . . . . . . . . . . . . . . . . . . . . . . .6-4 Segment selectors description of . . . . . . . . . . . . . . . . . . . . . . . .3-7 index field . . . . . . . . . . . . . . . . . . . . . . . . . . .3-7 null . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-7 RPL field . . . . . . . . . . . . . . . . . . . . . . . . 3-8, 4-2 TI (table indicator) flag . . . . . . . . . . . . . . . . .3-8 Segmented addressing . . . . . . . . . . . . . . . . . . .1-7 Segment-not-present exception (#NP). . . . . . .5-37 Segments basic flat...
View Full Document

Ask a homework question - tutors are online