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Unformatted text preview: tialization, interrupt- and exception-handling, and I/O emulation procedures that emulate a personal computer or other 8086-based platform. Typically, the monitor is either part of or closely associated with the protected-mode general-protection (#GP) exception handler, which also runs at a CPL of 0. As with any protected-mode code module, code-segment descriptors for the virtual-8086 monitor must exist in the GDT or in the task’s LDT. The virtual8086 monitor also may need data-segment descriptors so it can examine the IDT or other parts of the 8086 program in the first 1 MByte of the address space. The linear addresses above 10FFEFH are available for the monitor, the operating system, and other system software. The 8086 operating-system services consists of a kernel and/or operating-system procedures that the 8086 program makes calls to. These services can be implemented in either of the following two ways: • They can be included in the 8086 program. This approach is desirable for either of the following reasons: — The 8086 program code modifies the 8086 operating-system services. — There is not sufficient development time to merge the 8086 operating-system services into main operating system or executive. • They can be implemented or emulated in the virtual-8086 monitor. This approach is desirable for any of the following reasons: — The 8086 operating-system procedures can be more easily coordinated among several virtual-8086 tasks. — Memory can be saved by not duplicating 8086 operating-system procedure code for several virtual-8086 tasks. — The 8086 operating-system procedures can be easily emulated by calls to the main operating system or executive. The approach chosen for implementing the 8086 operating-system services may result in different virtual-8086-mode tasks using different 8086 operating-system services. 16.2.3. Paging of Virtual-8086 Tasks
Even though a program running in virtual-8086 mode can use only 20-bit linear addresses, the processor converts these addresses into 32-bit linear addresses before mapping them to the physical address space. If paging is being used, the 8086 address space for a program running in virtual-8086 mode can be paged and located in a set of pages in physical address space. If paging 16-10 8086 EMULATION is used, it is transparent to the program running in virtual-8086 mode just as it is for any task running on the processor. Paging is not necessary for a single virtual-8086-mode task, but paging is useful or necessary in the following situations: • • When running multiple virtual-8086-mode tasks. Here, paging allows the lower 1 MByte of the linear address space for each virtual-8086-mode task to be mapped to a different physical address location. When emulating the 8086 address-wraparound that occurs at 1 MByte. When using 8086style address translation, it is possible to specify addresses larger than 1 MByte. These addresses automatically wraparound in the Intel 8086 processor (refer to Section 16.1.1., “Address Translation in Real-Address Mode”). If any 8086 programs depend on address wraparound, the same effect can be achieved in a virtual-8086-mode task by mapping the linear addresses between 100000H and 110000H and linear addresses between 0 and 10000H to the same physical addresses. When sharing the 8086 operating-system services or ROM code that is common to several 8086 programs running as different 8086-mode tasks. When redirecting or trapping references to memory-mapped I/O devices. • • 16.2.4. Protection within a Virtual-8086 Task
Protection is not enforced between the segments of an 8086 program. Either of the following techniques can be used to protect the system software running in a virtual-8086-mode task from the 8086 program: • • Reserve the first 1 MByte plus 64 KBytes of each task’s linear address space for the 8086 program. An 8086 processor task cannot generate addresses outside this range. Use the U/S flag of page-table entries to protect the virtual-8086 monitor and other system software in the virtual-8086 mode task space. When the processor is in virtual-8086 mode, the CPL is 3. Therefore, an 8086 processor program has only user privileges. If the pages of the virtual-8086 monitor have supervisor privilege, they cannot be accessed by the 8086 program. 16.2.5. Entering Virtual-8086 Mode
Figure 16-3 summarizes the methods of entering and leaving virtual-8086 mode. The processor switches to virtual-8086 mode in either of the following situations: • Task switch when the VM flag is set to 1 in the EFLAGS register image stored in the TSS for the task. Here the task switch can be initiated in either of two ways: — A CALL or JMP instruction. — An IRET instruction, where the NT flag in the EFLAGS image is set to 1. • Return from a protected-mode interrupt or exception handler when the VM flag is set to 1 in the EFLAGS register image on the stack.
16-11 8086 EMULATION Real Mode Code Real-Address Mode PE=1 PE=0 or RESET Protected Mode ProtectedMode Tasks Task Switch1 Task Switch VM=0 ProtectedMode Interrupt and Exception Handlers CALL Virtual-8086 Monitor RE...
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This note was uploaded on 06/07/2013 for the course ECE 1234 taught by Professor Kwhon during the Spring '10 term at University of California, Berkeley.
- Spring '10