Unformatted text preview: as accessed (A), read enable (R), and conforming (C). Code segments can be execute-only or execute/read, depending on the setting of the read-enable bit. An execute/read segment might be used when constants or other static data have been placed with instruction code in a ROM. Here, data can be read from the code segment either by using an instruction with a CS override prefix or by loading a segment selector for the code segment in a data-segment register (the DS, ES, FS, or GS registers). In protected mode, code segments are not writable. Code segments can be either conforming or nonconforming. A transfer of execution into a moreprivileged conforming segment allows execution to continue at the current privilege level. A transfer into a nonconforming segment at a different privilege level results in a general-protection exception (#GP), unless a call gate or task gate is used (refer to Section 4.8.1., “Direct Calls or Jumps to Code Segments” in Chapter 4, Protection for more information on conforming and 3-14 PROTECTED-MODE MEMORY MANAGEMENT nonconforming code segments). System utilities that do not access protected facilities and handlers for some types of exceptions (such as, divide error or overflow) may be loaded in conforming code segments. Utilities that need to be protected from less privileged programs and procedures should be placed in nonconforming code segments.
NOTE Execution cannot be transferred by a call or a jump to a less-privileged (numerically higher privilege level) code segment, regardless of whether the target segment is a conforming or nonconforming code segment. Attempting such an execution transfer will result in a general-protection exception. All data segments are nonconforming, meaning that they cannot be accessed by less privileged programs or procedures (code executing at numerically high privilege levels). Unlike code segments, however, data segments can be accessed by more privileged programs or procedures (code executing at numerically lower privilege levels) without using a special access gate. The processor may update the Type field when a segment is accessed, even if the access is a read cycle. If the descriptor tables have been put in ROM, it may be necessary for hardware to prevent the ROM from being enabled onto the data bus during a write cycle. It also may be necessary to return the READY# signal to the processor when a write cycle to ROM occurs, otherwise the cycle will not terminate. These features of the hardware design are necessary for using ROM-based descriptor tables with the Intel386™ DX processor, which always sets the Accessed bit when a segment descriptor is loaded. The P6 family, Pentium®, and Intel486™ processors, however, only set the accessed bit if it is not already set. Writes to descriptor tables in ROM can be avoided by setting the accessed bits in every descriptor. 3.5. SYSTEM DESCRIPTOR TYPES When the S (descriptor type) flag in a segment descriptor is clear, the descriptor type is a system descriptor. The processor recognizes the following types of system descriptors: • • • • • • Local descriptor-table (LDT) segment descriptor. Task-state segment (TSS) descriptor. Call-gate descriptor. Interrupt-gate descriptor. Trap-gate descriptor. Task-gate descriptor. These descriptor types fall into two categories: system-segment descriptors and gate descriptors. System-segment descriptors point to system segments (LDT and TSS segments). Gate descriptors are in themselves “gates,” which hold pointers to procedure entry points in code segments (call, interrupt, and trap gates) or which hold segment selectors for TSS’s (task gates). Table 3-2 shows the encoding of the type field for system-segment descriptors and gate descriptors. 3-15 PROTECTED-MODE MEMORY MANAGEMENT Table 3-2. System-Segment and Gate-Descriptor Types
Type Field Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 11 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 10 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 9 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 8 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Reserved 16-Bit TSS (Available) LDT 16-Bit TSS (Busy) 16-Bit Call Gate Task Gate 16-Bit Interrupt Gate 16-Bit Trap Gate Reserved 32-Bit TSS (Available) Reserved 32-Bit TSS (Busy) 32-Bit Call Gate Reserved 32-Bit Interrupt Gate 32-Bit Trap Gate Description For more information on the system-segment descriptors, refer to Section 3.5.1., “Segment Descriptor Tables”, and Section 6.2.2., “TSS Descriptor” in Chapter 6, Task Management. For more information on the gate descriptors, refer to Section 4.8.2., “Gate Descriptors” in Chapter 4, Protection; Section 5.9., “IDT Descriptors” in Chapter 5, Interrupt and Exception Handling; and Section 6.2.4., “Task-Gate Descriptor” in Chapter 6, Task Management. 3.5.1. Segment Descriptor Tables A segment descriptor table is an array of segment descriptors (refer to Figure 3-10). A descriptor table is variable in length and can contain up to 8192 (213) 8-byte descriptors. There are two kinds of descrip...
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This note was uploaded on 06/07/2013 for the course ECE 1234 taught by Professor Kwhon during the Spring '10 term at Berkeley.
- Spring '10