IntelSoftwareDevelopersManual

Asm shown in example 8 2 defines the data and stack

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Unformatted text preview: 282 283 284 285 286 287 288 289 290 291 292 293 294 MOV EDI,EAX MOV EBX,TSS_INDEX*SIZE(DESC) MOV ECX,GDT_DESC_OFF ;build linear address for TSS MOV GS,CX MOV DH,GS:[EBX].bas_24_31 MOV DL,GS:[EBX].bas_16_23 ROL EDX,16 MOV DX,GS:[EBX].bas_0_15 MOV ESI,EDX LSL ECX,EBX INC ECX MOV EDX,EAX ADD EAX,ECX REP MOVS BYTE PTR ES:[EDI],BYTE PTR DS:[ESI] ; fixup TSS pointer MOV GS:[EBX].bas_0_15,DX ROL EDX,16 MOV GS:[EBX].bas_24_31,DH MOV GS:[EBX].bas_16_23,DL ROL EDX,16 ;save start of free ram at linear location RAMSTART MOV free_mem_linear_base+RAM_START,EAX ;assume no LDT used in the initial task - if necessary, ;code to move the LDT could be added, and should resemble ;that used to move the TSS ; load task register LTR BX ; No task switch, only descriptor loading ; See Figure 8-6 ; load minimal set of registers necessary to simulate task ; switch MOV MOV MOV MOV PUSH PUSH PUSH MOV MOV MOV MOV AX,[EDX].SS_reg ; start loading registers EDI,[EDX].ESP_reg SS,AX ESP,EDI ; stack now valid DWORD PTR [EDX].EFLAGS_reg DWORD PTR [EDX].CS_reg DWORD PTR [EDX].EIP_reg AX,[EDX].DS_reg BX,[EDX].ES_reg DS,AX ; DS and ES no longer linear memory ES,BX 8-25 PROCESSOR MANAGEMENT AND INITIALIZATION 295 ; simulate far jump to initial task 296 IRETD 297 298 STARTUP_CODE ENDS *** WARNING #377 IN 298, (PASS 2) SEGMENT CONTAINS PRIVILEGED INSTRUCTION(S) 299 300 END STARTUP, DS:STARTUP_DATA, SS:STARTUP_DATA 301 302 ASSEMBLY COMPLETE, 1 WARNING, NO ERRORS. FFFF FFFFH START: [CS.BASE+EIP] FFFF 0000H • Jump near start • Construct TEMP_GDT • LGDT • Move to protected mode DS, ES = GDT[1] 4GB Base Limit GDT [1] GDT [0] Base=0, Limit=4G 0 GDT_SCRATCH TEMP_GDT Figure 8-4. Constructing Temporary GDT and Switching to Protected Mode (Lines 162-172 of List File) 8-26 PROCESSOR MANAGEMENT AND INITIALIZATION FFFF FFFFH TSS IDT GDT • Move the GDT, IDT, TSS from ROM to RAM • Fix Aliases • LTR TSS RAM IDT RAM GDT RAM RAM_START 0 Figure 8-5. Moving the GDT, IDT and TSS from ROM to RAM (Lines 196-261 of List File) 8-27 PROCESSOR MANAGEMENT AND INITIALIZATION SS = TSS.SS ESP = TSS.ESP PUSH TSS.EFLAG PUSH TSS.CS PUSH TSS.EIP ES = TSS.ES DS = TSS.DS IRET • • EIP EFLAGS • • • ESP • ES CS SS DS GDT IDT Alias GDT Alias 0 TSS RAM IDT RAM GDT RAM RAM_START Figure 8-6. Task Switching (Lines 282-296 of List File) 8-28 PROCESSOR MANAGEMENT AND INITIALIZATION 8.9.3. MAIN.ASM Source Code The file MAIN.ASM shown in Example 8-2 defines the data and stack segments for this application and can be substituted with the main module task written in a high-level language that is invoked by the IRET instruction executed by STARTUP.ASM. Example 8-2. MAIN.ASM NAME main_module data SEGMENT RW dw 1000 dup(?) DATA ENDS stack stackseg 800 CODE SEGMENT ER use32 PUBLIC main_start: nop nop nop CODE ENDS END main_start, ds:data, ss:stack 8.9.4. Supporting Files The batch file shown in Example 8-3 can be used to assemble the source code files STARTUP.ASM and MAIN.ASM and build the final application. Example 8-3. Batch File to Assemble and Build the Application ASM386 STARTUP.ASM ASM386 MAIN.ASM BLD386 STARTUP.OBJ, MAIN.OBJ buildfile(EPROM.BLD) bootstrap(STARTUP) Bootload BLD386 performs several operations in this example: • • • • It allocates physical memory location to segments and tables. It generates tables using the build file and the input files. It links object files and resolves references. It generates a boot-loadable file to be programmed into the EPROM. Example 8-4 shows the build file used as an input to BLD386 to perform the above functions. 8-29 PROCESSOR MANAGEMENT AND INITIALIZATION Example 8-4. Build File INIT_BLD_EXAMPLE; SEGMENT *SEGMENTS(DPL = 0) , startup.startup_code(BASE = 0FFFF0000H) ; TASK BOOT_TASK(OBJECT = startup, INITIAL,DPL = 0, NOT INTENABLED) , PROTECTED_MODE_TASK(OBJECT = main_module,DPL = 0, NOT INTENABLED) ; TABLE GDT ( LOCATION = GDT_EPROM , ENTRY = ( 10: PROTECTED_MODE_TASK , startup.startup_code , startup.startup_data , main_module.data , main_module.code , main_module.stack ) ), IDT ( LOCATION = IDT_EPROM ); MEMORY ( RESERVE = (0..3FFFH -- Area for the GDT, IDT, TSS copied from ROM , 60000H..0FFFEFFFFH) , RANGE = (ROM_AREA = ROM (0FFFF0000H..0FFFFFFFFH)) -- Eprom size 64K , RANGE = (RAM_AREA = RAM (4000H..05FFFFH)) ); END Table 8-5 shows the relationship of each build item with an ASM source file. 8-30 PROCESSOR MANAGEMENT AND INITIALIZATION Table 8-5. Relationship Between BLD Item and ASM Source File Item Bootstrap GDT location ASM386 and Startup.A58 public startup startup: public GDT_EPROM GDT_EPROM TABLE_REG <> public IDT_EPROM IDT_EPROM TABLE_REG <> RAM_START equ 400H BLD386 Controls and BLD file bootstrap start(startup) TABLE GDT(location = GDT_EPROM) TABLE IDT(location = IDT_EPROM memory (reserve = (0..3FFFH)) Effect Near jump at 0FFFFFFF0H to start The location of the GDT will be programmed into the GDT_EPROM location The location of the IDT will be programmed into the IDT_EPROM location RAM_START is used as the ram destination for moving the tables. It must be excluded from the application’s segment area. Put the descriptor of the a...
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This note was uploaded on 06/07/2013 for the course ECE 1234 taught by Professor Kwhon during the Spring '10 term at University of California, Berkeley.

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