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This interrupt in turn is a result of software

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Unformatted text preview: e beginning of every message, each APIC presents the type of the message it is sending and its current arbitration priority on the APIC bus. This information is used for arbitration. After each arbitration cycle (within an arbitration round, only the potential winners keep driving the bus. By the time all arbitration cycles are completed, there will be only one APIC left driving the bus. Once a winner is selected, it is granted exclusive use of the bus, and will continue driving the bus to send its actual message. After each successfully transmitted message, all APICs increase their arbitration priority by 1. The previous winner (that is, the one that has just successfully transmitted its message) assumes a priority of 0 (lowest). An agent whose arbitration priority was 15 (highest) during arbitration, but did not send a message, adopts the previous winner’s arbitration priority, incremented by 1. Note that the arbitration protocol described above is slightly different if one of the APICs issues a special End-Of-Interrupt (EOI). This high-priority message is granted the bus regardless of its sender’s arbitration priority, unless more than one APIC issues an EOI message simultaneously. In the latter case, the APICs sending the EOI messages arbitrate using their arbitration priorities. 7-36 MULTIPLE-PROCESSOR MANAGEMENT If the APICs are set up to use “lowest priority” arbitration (refer to Section 7.5.10., “Interrupt Distribution Mechanisms”) and multiple APICs are currently executing at the lowest priority (the value in the APR register), the arbitration priorities (unique values in the Arb ID register) are used to break ties. All 8 bits of the APR are used for the lowest priority arbitration. 7.5.16.1. BUS MESSAGE FORMATS The APICs use three types of messages: EOI message, short message, and non-focused lowest priority message. The purpose of each type of message and its format are described below. EOI Message. Local APICs send 14-cycle EOI messages to the I/O APIC to indicate that a level triggered interrupt has been accepted by the processor. This interrupt, in turn, is a result of software writing into the EOI register of the local APIC. Table 7-3 shows the cycles in an EOI message. The checksum is computed for cycles 6 through 9. It is a cumulative sum of the 2-bit (Bit1:Bit0) logical data values. The carry out of all but the last addition is added to the sum. If any APIC computes a different checksum than the one appearing on the bus in cycle 10, it signals an error, driving 11 on the APIC bus during cycle 12. In this case, the APICs disregard the message. The sending APIC will receive an appropriate error indication (refer to Section 7.5.17., “Error Handling”) and resend the message. The status cycles are defined in Table 7-6. Short Message. Short messages (21-cycles) are used for sending fixed, NMI, SMI, INIT, startup, ExtINT and lowest-priority-with-focus interrupts. Table 7-4 shows the cycles in a short message. Table 7-3. EOI Message (14 Cycles) Cycle 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Bit1 1 ArbID3 ArbID2 ArbID1 ArbID0 V7 V5 V3 V1 C 0 A A1 0 Bit0 1 0 0 0 0 V6 V4 V2 V0 C 0 A A1 0 Status Cycle 0 Status Cycle 1 Idle Checksum for cycles 6 - 9 Interrupt vector V7 - V0 11 = EOI Arbitration ID bits 3 through 0 7-37 MULTIPLE-PROCESSOR MANAGEMENT If the physical delivery mode is being used, then cycles 15 and 16 represent the APIC ID and cycles 13 and 14 are considered don’t care by the receiver. If the logical delivery mode is being used, then cycles 13 through 16 are the 8-bit logical destination field. For shorthands of “allincl-self” and “all-excl-self,” the physical delivery mode and an arbitration priority of 15 (D0:D3 = 1111) are used. The agent sending the message is the only one required to distinguish between the two cases. It does so using internal information. When using lowest priority delivery with an existing focus processor, the focus processor identifies itself by driving 10 during cycle 19 and accepts the interrupt. This is an indication to other APICs to terminate arbitration. If the focus processor has not been found, the short message is extended on-the-fly to the non-focused lowest-priority message. Note that except for the EOI message, messages generating a checksum or an acceptance error (refer to Section 7.5.17., “Error Handling”) terminate after cycle 21. Table 7-4. Short Message (21 Cycles) Cycle 1 2 3 4 5 6 7 Cycle 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Bit1 0 ArbID3 ArbID2 ArbID1 ArbID0 DM M1 Bit1 L V7 V5 V3 V1 D7 D5 D3 D1 C 0 A A1 0 Bit0 1 0 0 0 0 M2 M0 Bit0 TM V6 V4 V2 V0 D6 D4 D2 D0 C 0 A A1 0 Status cycle 0 Status cycle 1 Idle Checksum for cycles 6-16 D7-D0 = Destination L = Level, TM = Trigger Mode V7-V0 = Interrupt Vector DM = Destination Mode M2-M0 = Delivery mode 0 1 = normal Arbitration ID bits 3 through 0 Nonfocused Lowest Priority Message. These 34-cycle messages (refer to Table 7-5) are used in the lowest priority delivery mode when a focus processor is not present. Cycles 1 through...
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This note was uploaded on 06/07/2013 for the course ECE 1234 taught by Professor Kwhon during the Spring '10 term at University of California, Berkeley.

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