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Unmasked response the ue flag is set in mxcsr if the

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Unformatted text preview: ished by an exception handler that responds to unmasked denormal operand exceptions. Note that the response for RCPPS, RSQRTPS, RCPSS and RSQRTSS is to return an infinity of the same sign as the operand. These instructions do not set any exception flags and thus are not affected by the exception masks. Conversion instructions (CVTPI2PS, CVTPS2PI, CVTTPS2PI, CVTSI2SS, CVTSS2SI, CVTTSS2SI) do not signal denormal exceptions. The flag (DE) for this exception is bit 1 of MXCSR, and the mask bit (DM) is bit 8 of MXCSR. The denormal operand exception is not affected by the flush-to-zero mode. 11.7.3.4. NUMERIC OVERFLOW EXCEPTION (#O) The processor reports a floating-point numeric overflow exception whenever the result of an instruction rounded to the destination precision with unbounded exponent exceeds the largest allowable finite value that will fit into the destination operand. This is possible with ADDPS, ADDSS, SUBPS, SUBSS, MULPS, MULSS, DIVPS, DIVSS. When a numeric overflow exception occurs and the exception is masked, the processor sets the MXCSR.OE and MXCSR.PE flags and returns one of the values shown in Table 11-9 according to the current rounding mode of the processor (see Section 11.3.2.1., “Rounding Control Field”). When a numeric overflow exception occurs and the exception is unmasked, the operands are left unaltered and a software exception handler is invoked (see Section 11.7.2.3., “Software Exception Handling - Unmasked Exceptions”). The MXCSR.OE flag is set; the MXCSR.PE flag is only set if a loss of accuracy has occurred in addition to overflow when rounding the result to the destination precision, with unbounded exponent. The flag (OE) for the numeric overflow exception is bit 3 of MXCSR, and the mask bit (OM) is bit 10 of MXCSR. The numeric overflow exception is not affected by the flush-to-zero mode. 11-19 STREAMING SIMD EXTENSIONS SYSTEM PROGRAMMING Note that the overflow status flag is not set by RCPPS/RCPSS, since these instructions are combinatorial and are not affected by exception masks. . Table 11-9. Masked Responses to Numeric Overflow Rounding Mode To nearest + – Toward –∞ Toward +∞ + – + – Toward zero + – Sign of True Result +∞ –∞ Largest finite positive number –∞ +∞ Largest finite negative number Largest finite positive number Largest finite negative number Result 11.7.3.5. NUMERIC UNDERFLOW EXCEPTION (#U) The processor might report a floating-point numeric underflow exception whenever the rounded result of an arithmetic instruction is tiny; that is, the result rounded to the destination precision with unbounded exponent is less than the smallest possible normalized, finite value that will fit into the destination operand. The Underflow exception can occur in the execution of the instructions ADDPS, ADDSS, SUBPS, SUBSS, MULPS, MULSS, DIVPS and DIVSS. Two related events contribute to underflow: • • Creation of a tiny result which, because it is so small, may cause some other exception later (such as overflow upon division). Creation of an inexact result; i.e. the delivered result differs from what would have been computed were both the exponent and precision unbounded. Which of these events triggers the underflow exception depends on whether the underflow exception is masked: • • • • Underflow exceptions masked. The underflow exception is signaled when the result is both tiny and inexact. Underflow exceptions not masked: The underflow exception is signaled when the result is tiny, regardless of inexactness. The response to an underflow exception also depends on whether the exception is masked: Masked response: The result is normal, denormal or zero. The precision exception is also triggered. The OE and PE flags are set in MXCSR. Unmasked response: The UE flag is set in MXCSR. If the original computation generated an imprecise mantissa, the inexact (#P) status flag PE will also be set in the MXCSR. In either case (result imprecise or not), the underflow (#U) status flag is set, the operands are 11-20 STREAMING SIMD EXTENSIONS SYSTEM PROGRAMMING left unaltered, and a software exception handler is invoked (see Section 11.7.2.3., “Software Exception Handling - Unmasked Exceptions”). If underflow is masked and flush-to-zero mode is enabled, an underflow condition will set the underflow (#U) and inexact (#P) status flags UE and PE in MXCSR and a correctly signed zero result will be returned; this will avoid the performance penalty associated with generating a denormalized result. If underflow is unmasked, the flush-to-zero mode is ignored and an underflow condition will be handled as described above. Note that the underflow status flag is not set by RCPPS/RCPSS, since these instructions are combinatorial and are not affected by exception masks. The flag (UE) for the numeric underflow exception is bit 4 of MXCSR and the mask bit (UM) is bit 11 of MXCSR. 11.7.3.6. INEXACT RESULT (PRECISION) EXCEPTION (#P) The inexact result exception (also called the precision exception) occurs if the result of an operation is not exactly representable in the destination format. For example, the fraction 1/3...
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