Practice_Exam_ECE_spring_07_final_version_sol_Set

Practice_Exam_ECE_spring_07_final_version_sol_Set - Final...

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Final Exam ECE 315 Spring 2006 Open Book and two pages of notes 1. 10pts . Below is a semiconductor which has been patterned into the shape illustrated. The thickness of the material is 1um with a mobility of 1000 cm 2 /V- sec. Assume the fields transform abruptly at the interface. The doping in region 1 and region 3 is 1x10 17 cm -3 the doping in region 2 is 1x10 16 cm 3 L 1 =10um, L 2 =50um, L 3 =20um and W 1 =100um, W 2 =10um, W 3 =50um a. Calculate the total resistance of each layer. b. What is the current in each layer if a voltage of 1V is applied to as shown c. What is the electron drift velocity in each layer d. If the voltage is increased and the saturation velocity is 1x10 7 cm/sec. What is the voltage V A where saturation velocity is achieved in the materia 1,3 17 19 2 16 19 1 .0624 (10 )(1000)(1.602x10 ) 1 .624 (10 )(1000)(1.602x10 ) ρ ρ - - = = = = W 3 W 1 L 1 L 3 Contact V W 2 L 2 Region 3 Region 2 Region 1
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4 4 1 2 4 4 4 4 4 3 4 4 (.0624)(10x10 ) (.624)(50x10 ) R 62.4, R 31200, (100x10 )(10 ) (10x10 )(10 ) (.0624)(20x10 ) R 249.6 (50x10 )(10 ) - - - - - - - - - = = = = = = 1 I .0317ma 62.4 31200 249.6 = = + + for all layers 5 1 2 4 4 3 4 62.4 31200 1x 1x 31512 31512 v (1000) 1980cm /sec, v (1000) 1.980x10 cm /sec 10x10 50x10 249.6 1x 31512 v (1000) 3960.3cm /sec 20x10 - - - = = = = = = Assume all voltage drops across region 2 7 A A 4 V 1000x 10 V 50 50x10 - = = 2. 15pts . For a MOS Capacitor biased as shown below V tn =1V. a. Sketch the charge vs distance for (V A =1V and V B =0) and (V A =1V and VB=.5V) b. Sketch the Electic Field vs distance. for (V A =1V and V B =0) and(V A =1V and VB=.5V) c. Sketch the Potential vs distance. for (V A =1V and V B =0) and (V A =1V and VB=.5V) d. Sketch the carrier densisty (n, p) verses distance. for, (V A =1V and V B =0) and (V A =1V and VB=.5V) For all graphs use the scale shown below indicate the different conditions by solid or dotted lines.
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Solid line is case 1 inversion Dotted line is case 2 Semiconductor ( p type ) Oxide Metal n + poly Si V V 0 -t Ox X F, (n, p), Φ
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-t Ox X
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  • Spring '07
  • SPENCER
  • Microelectronics, small signal, drain voltage, small signal diagram

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