Conditions can be the results of a comparison or test

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Unformatted text preview: condition resulted earlier (N and V status bits equal on comparison of two signed numbers). Conditions can be the results of a comparison or test 2008 Chapter-2 L13: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education 11 Compare and Test Instructions The result destines to CPSR, which stores the four condition bits, N, V, C, and Z. Bit wise Test two words (TST). Bit wise Negated Test between two words (TEQ). Compare two words and the result is at the CPSR condition bits (CMP). Compare two negative words and the result is at the CPSR condition bits (CMN). 2008 Chapter-2 L13: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education 12 Program-Flow Control Instructions Branching (B) or Branch conditional operations. Branch to an address relative to PC word in r15 (B) 'B #1A8' means add in PC 1A8 and change the program flow. 'BGE #100' means that if a GE condition resulted on a compare 0 test, add in PC 1A8. Similar instructions for different conditions of the processor status flags 2008 Chapter-2 L13: "Embedded Systems - " , Raj Kamal, Publs.: McGraw-Hill Education 13 Software Interrupt instruction S...
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This note was uploaded on 07/24/2013 for the course ECON 101 taught by Professor Kool during the Winter '12 term at Canadian University of Dubai.

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