ia-32_instruction-set-ref_a-m

7 fnstsw m2byte valid valid df e0 fnstsw ax valid

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Unformatted text preview: ective address is outside the CS, DS, ES, FS, or GS segment limit. If a memory operand effective address is outside the SS segment limit. CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made. Compatibility Mode Exceptions Same exceptions as in Protected Mode. 64-Bit Mode Exceptions #SS(0) #GP(0) #NM #MF #PF(fault-code) #AC(0) If a memory address referencing the SS segment is in a noncanonical form. If the memory address is in a non-canonical form. CR0.EM[bit 2] or CR0.TS[bit 3] = 1. If there is a pending x87 FPU exception. If a page fault occurs. If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3. Vol. 2 3-395 INSTRUCTION SET REFERENCE, A-M FSUB/FSUBP/FISUB--Subtract Opcode D8 /4 DC /4 D8 E0+i DC E8+i DE E8+i Instruction FSUB m32fp FSUB m64fp FSUB ST(0), ST(i) FSUB ST(i), ST(0) FSUBP ST(i), ST(0) 64-Bit Mode Valid Valid Valid Valid Valid Compat/ Leg Mode Valid Valid Valid Valid Valid Description Subtract m32fp from ST(0) and store result in ST(0). Subtract m64fp from ST(0) and store result in ST(0). Subtract ST(i) from ST(0) and store result in ST(0). Subtract ST(0) from ST(i) and store result in ST(i). Subtract ST(0) from ST(i), store result in ST(i), and pop register stack. Subtract ST(0) from ST(1), store result in ST(1), and pop register stack. Subtract m32int from ST(0) and store result in ST(0). Subtract m16int from ST(0) and store result in ST(0). DE E9 FSUBP Valid Valid DA /4 DE /4 FISUB m32int FISUB m16int Valid Valid Valid Valid Description Subtracts the source operand from the destination operand and stores the difference in the destination location. The destination operand is always an FPU data register; the source operand can be a register or a memory location. Source operands in memory can be in single-precision or double-precision floating-point format or in word or doubleword integer format. The no-operand version of the instruction subtracts the contents of the ST(0) register from the ST(1) register and stores the result in ST(1). The one-operand version subtracts the contents of a memory location (either a floating-point or an integer value) from the contents of the ST(0) register and stores the result in ST(0). The two-operand version, subtracts the contents of the ST(0) register from the ST(i) register or vice versa. The FSUBP instructions perform the additional operation of popping the FPU register stack following the subtraction. To pop the register stack, the processor marks the ST(0) register as empty and increments the stack pointer (TOP) by 1. The nooperand version of the floating-point subtract instructions always results in the register stack being popped. In some assemblers, the mnemonic for this instruction is FSUB rather than FSUBP. The FISUB instructions convert an integer source operand to double extended-precision floating-point format before performing the subtraction. 3-39...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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