ia-32_instruction-set-ref_a-m

A m table 3 17 encoding of cache and tlb descriptors

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Unformatted text preview: el cache: 1 MByte, 4-way set associative, 32 byte line size 2nd-level cache: 2 MByte, 4-way set associative, 32 byte line size 3rd-level cache: 4 MByte, 4-way set associative, 64 byte line size 3rd-level cache: 8 MByte, 8-way set associative, 64 byte line size 2nd-level cache: 4 MByte, 16-way set associative, 64 byte line size Cache or TLB Description Vol. 2 3-177 INSTRUCTION SET REFERENCE, A-M Table 3-17. Encoding of Cache and TLB Descriptors (Contd.) Descriptor Value 50H 51H 52H 56H 57H 5BH 5CH 5DH 60H 66H 67H 68H 70H 71H 72H 78H 79H 7AH 7BH 7CH 7DH 7FH 82H 83H 84H 85H 86H 87H Cache or TLB Description Instruction TLB: 4 KByte and 2-MByte or 4-MByte pages, 64 entries Instruction TLB: 4 KByte and 2-MByte or 4-MByte pages, 128 entries Instruction TLB: 4 KByte and 2-MByte or 4-MByte pages, 256 entries Data TLB0: 4 MByte pages, 4-way set associative, 16 entries Data TLB0: 4 KByte pages, 4-way associative, 16 entries Data TLB: 4 KByte and 4 MByte pages, 64 entries Data TLB: 4 KByte and 4 MByte pages,128 entries Data TLB: 4 KByte and 4 MByte pages,256 entries 1st-level data cache: 16 KByte, 8-way set associative, 64 byte line size 1st-level data cache: 8 KByte, 4-way set associative, 64 byte line size 1st-level data cache: 16 KByte, 4-way set associative, 64 byte line size 1st-level data cache: 32 KByte, 4-way set associative, 64 byte line size Trace cache: 12 K-op, 8-way set associative Trace cache: 16 K-op, 8-way set associative Trace cache: 32 K-op, 8-way set associative 2nd-level cache: 1 MByte, 4-way set associative, 64byte line size 2nd-level cache: 128 KByte, 8-way set associative, 64 byte line size, 2 lines per sector 2nd-level cache: 256 KByte, 8-way set associative, 64 byte line size, 2 lines per sector 2nd-level cache: 512 KByte, 8-way set associative, 64 byte line size, 2 lines per sector 2nd-level cache: 1 MByte, 8-way set associative, 64 byte line size, 2 lines per sector 2nd-level cache: 2 MByte, 8-way set associative, 64byte line size 2nd-level cache: 512 KByte, 2-way set associative, 64-byte line size 2nd-level cache: 256 KByte, 8-way set associative, 32 byte line size 2nd-level cache: 512 KByte, 8-way set associative, 32 byte line size 2nd-level cache: 1 MByte, 8-way set associative, 32 byte line size 2nd-level cache: 2 MByte, 8-way set associative, 32 byte line size 2nd-level cache: 512 KByte, 4-way set associative, 64 byte line size 2nd-level cache: 1 MByte, 8-way set associative, 64 byte line size 3-178 Vol. 2 INSTRUCTION SET REFERENCE, A-M Table 3-17. Encoding of Cache and TLB Descriptors (Contd.) Descriptor Value B0H B3H B4H F0H F1H Cache or TLB Description Instruction TLB: 4 KByte pages, 4-way set associative, 128 entries Data TLB: 4 KByte pages, 4-way set associative, 128 entries Data TLB1: 4 KByte pages, 4-way associative, 256 entries 64-Byte prefetching 128-Byte prefetching Example 3-1. Example of Cache and TLB Interpretation The first member of the family of Pentium 4 processors returns the following information about caches...
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This note was uploaded on 10/01/2013 for the course CPE 103 taught by Professor Watlins during the Winter '11 term at Mississippi State.

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