ia-32_instruction-set-ref_a-m

Al register to contain the correct 1 digit unpacked

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Unformatted text preview: AH AH + 1; AF 1; CF 1; AL AL AND 0FH; ELSE AF 0; CF 0; AL AL AND 0FH; FI; FI; Flags Affected The AF and CF flags are set to 1 if the adjustment results in a decimal carry; otherwise they are set to 0. The OF, SF, ZF, and PF flags are undefined. Vol. 2 3-19 INSTRUCTION SET REFERENCE, A-M Protected Mode Exceptions None. Real-Address Mode Exceptions None. Virtual-8086 Mode Exceptions None. Compatibility Mode Exceptions None. 64-Bit Mode Exceptions #UD If in 64-bit mode. 3-20 Vol. 2 INSTRUCTION SET REFERENCE, A-M AAD--ASCII Adjust AX Before Division Opcode D5 0A D5 ib Instruction AAD (No mnemonic) 64-Bit Mode Invalid Invalid Compat/ Leg Mode Valid Valid Description ASCII adjust AX before division. Adjust AX before division to number base imm8. Description Adjusts two unpacked BCD digits (the least-significant digit in the AL register and the most-significant digit in the AH register) so that a division operation performed on the result will yield a correct unpacked BCD value. The AAD instruction is only useful when it precedes a DIV instruction that divides (binary division) the adjusted value in the AX register by an unpacked BCD value. The AAD instruction sets the value in the AL register to (AL + (10 * AH)), and then clears the AH register to 00H. The value in the AX register is then equal to the binary equivalent of the original unpacked two-digit (base 10) number in registers AH and AL. The generalized version of this instruction allows adjustment of two unpacked digits of any number base (see the "Operation" section below), by setting the imm8 byte to the selected number base (for example, 08H for octal, 0AH for decimal, or 0CH for base 12 numbers). The AAD mnemonic is interpreted by all assemblers to mean adjust ASCII (base 10) values. To adjust values in another number base, the instruction must be hand coded in machine code (D5 imm8). This instruction executes as described in compatibility mode and legacy mode. It is not valid in 64-bit mode. Operation IF 64-Bit Mode THEN #UD; ELSE tempAL AL; tempAH AH; AL (tempAL + (tempAH imm8)) AND FFH; (* imm8 is set to 0AH for the AAD mnemonic.*) AH 0; FI; The immediate value (imm8) is taken from the second byte of the instruction. Vol. 2 3-21 INSTRUCTION SET REFERENCE, A-M Flags Affected The SF, ZF, and PF flags are set according to the resulting binary value in the AL register; the OF, AF, and CF flags are undefined. Protected Mode Exceptions None. Real-Address Mode Exceptions None. Virtual-8086 Mode Exceptions None. Compatibility Mode Exceptions None. 64-Bit Mode Exceptions #UD If in 64-bit mode. 3-22 Vol. 2 INSTRUCTION SET REFERENCE, A-M AAM--ASCII Adjust AX After Multiply Opcode D4 0A D4 ib Instruction AAM (No mnemonic) 64-Bit Mode Invalid Invalid Compat/ Leg Mode Valid Valid Description ASCII adjust AX after multiply. Adjust AX after multiply to number base imm8. Description Adjusts the result of the multiplication of two unpacked BCD values to create a pair of unpacked (base 10) BCD values. The AX registe...
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