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C3 c2 c0 100 esac if st0 or src nan or unsupported

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Unformatted text preview: or ordered values, and set status flags accordingly. Compare ST(0) with ST(i), check for ordered values, set status flags accordingly, and pop register stack. DF E8+i FUCOMIP ST, ST(i) Valid Valid Description Performs an unordered comparison of the contents of registers ST(0) and ST(i) and sets the status flags ZF, PF, and CF in the EFLAGS register according to the results (see the table below). The sign of zero is ignored for comparisons, so that 0.0 is equal to +0.0. Table 3-27. FCOMI/FCOMIP/ FUCOMI/FUCOMIP Results Comparison Results* ST0 > ST(i) ST0 < ST(i) ST0 = ST(i) Unordered** ZF 0 0 1 1 PF 0 0 0 1 CF 0 1 0 1 NOTES: * See the IA-32 Architecture Compatibility section below. ** Flags not set if unmasked invalid-arithmetic-operand (#IA) exception is generated. An unordered comparison checks the class of the numbers being compared (see "FXAM--ExamineModR/M" in this chapter). The FUCOMI/FUCOMIP instructions perform the same operations as the FCOMI/FCOMIP instructions. The only difference is that the FUCOMI/FUCOMIP instructions raise the invalid-arithmetic-operand exception (#IA) only when either or both operands are an SNaN or are in an unsupported format; QNaNs cause the condition code flags to be set to unordered, but do not cause an exception to be generated. The FCOMI/FCOMIP instructions raise an invalid-operation exception when either or both of the operands are a NaN value of any kind or are in an unsupported format. Vol. 2 3-307 INSTRUCTION SET REFERENCE, A-M If the operation results in an invalid-arithmetic-operand exception being raised, the status flags in the EFLAGS register are set only if the exception is masked. The FCOMI/FCOMIP and FUCOMI/FUCOMIP instructions clear the OF flag in the EFLAGS register (regardless of whether an invalid-operation exception is detected). The FCOMIP and FUCOMIP instructions also pop the register stack following the comparison operation. To pop the register stack, the processor marks the ST(0) register as empty and increments the stack pointer (TOP) by 1. This instruction's operation is the same in non-64-bit modes and 64-bit mode. IA-32 Architecture Compatibility The FCOMI/FCOMIP/FUCOMI/FUCOMIP instructions were introduced to the IA-32 Architecture in the P6 family processors and are not available in earlier IA-32 processors. Operation CASE (relation of operands) OF ST(0) > ST(i): ZF, PF, CF 000; ST(0) < ST(i): ZF, PF, CF 001; ST(0) = ST(i): ZF, PF, CF 100; ESAC; IF Instruction is FCOMI or FCOMIP THEN IF ST(0) or ST(i) = NaN or unsupported format THEN #IA IF FPUControlWord.IM = 1 THEN ZF, PF, CF 111; FI; FI; FI; IF Instruction is FUCOMI or FUCOMIP THEN IF ST(0) or ST(i) = QNaN, but not SNaN or unsupported format THEN ZF, PF, CF 111; ELSE (* ST(0) or ST(i) is SNaN or unsupported format *) #IA; IF FPUControlWord.IM = 1 THEN ZF, PF, CF 111; 3-308 Vol. 2 INSTRUCTION SET REFERENCE, A-M FI; FI; FI; IF Instruction is FCOMIP or FUCOMIP THEN PopRegisterStack; FI; FPU Flags Affected C1 C0, C2...
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  • Winter '11
  • Watlins
  • X86, Intel corporation, Packed Single-Precision Floating-Point, Packed Double-Precision Floating-Point, single-precision floating-point values

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